Microchip Technology SW006023-1N Data Sheet
MPLAB
®
XC32 C/C++ Compiler User’s Guide
DS51686E-page 150
2012 Microchip Technology Inc.
12.3.5.4
COUNT REGISTER (Count – CP0 REGISTER 9, SELECT 0)
This register acts as a timer, incrementing at a constant rate, whether or not an
instruction is executed, retired, or any forward progress is made through the pipeline.
The counter increments every other clock if the DC bit in the Cause register is ‘0’. The
Count
instruction is executed, retired, or any forward progress is made through the pipeline.
The counter increments every other clock if the DC bit in the Cause register is ‘0’. The
Count
register can be written for functional or diagnostic purposes, including at Reset
or to synchronize processors. By writing the Count
DM
bit in the Debug register, it is
possible to control whether the Count register continues incrementing while the
processor is in Debug mode.
processor is in Debug mode.
This register is cleared in the PIC32MX start-up code.
12.3.5.5
COMPARE REGISTER (Compare – CP0 REGISTER 11, SELECT 0)
This register acts in conjunction with the Count register to implement a timer and timer
interrupt function. The timer interrupt is an output of the core. The Compare register
maintains a stable value and does not change on its own. When the value of the Count
register equals the value of the Compare register, the SI_TimerInt pin is asserted.
This pin remains asserted until the Compare register is written. The SI_TimerInt pin
can be fed back into the core on one of the interrupt pins to generate an interrupt. For
diagnostic purposes, the Compare register is a read/write register. In normal use,
however, the Compare register is write-only. Writing a value to the Compare register,
as a side effect, clears the timer interrupt.
interrupt function. The timer interrupt is an output of the core. The Compare register
maintains a stable value and does not change on its own. When the value of the Count
register equals the value of the Compare register, the SI_TimerInt pin is asserted.
This pin remains asserted until the Compare register is written. The SI_TimerInt pin
can be fed back into the core on one of the interrupt pins to generate an interrupt. For
diagnostic purposes, the Compare register is a read/write register. In normal use,
however, the Compare register is write-only. Writing a value to the Compare register,
as a side effect, clears the timer interrupt.
This register is set to 0xFFFFFFFF in the PIC32MX start-up code.
12.3.5.6
STATUS REGISTER (Status – CP0 REGISTER 12, SELECT 0)
This register is a read/write register that contains the operating mode, Interrupt
Enabling, and the diagnostic states of the processor. Fields of this register combine to
create operating modes for the processor.
Enabling, and the diagnostic states of the processor. Fields of this register combine to
create operating modes for the processor.
The following settings are initialized by the PIC32MX start-up code
(0b000000000x0xx0?00000000000000000):
(0b000000000x0xx0?00000000000000000):
• Access to Coprocessor 0 not allowed in User mode (CU0 = 0)
• User mode uses configured endianess (RE = 0)
• No change to exception vectors location (BEV = no change)
• No change to flag bits that indicate reason for entry to the Reset exception vector
(SR, NMI = no change)
• Interrupt masks are cleared to disable any pending interrupt requests (IM7..IM2
= 0, IM1..IM0 = 0
)
• Interrupt priority level is 0 (IPL = 0)
• Base mode is Kernel mode (UM = 0)
• Error level is normal (ERL = 0)
• Exception level is normal (EXL = 0)
• Interrupts are disabled (IE = 0)
12.3.5.7
INTERRUPT CONTROL REGISTER (IntCtl – CP0 REGISTER 12,
SELECT 1)
SELECT 1)
This register controls the expanded interrupt capability added in Release 2 of the
Architecture, including vectored interrupts and support for an external interrupt
controller.
Architecture, including vectored interrupts and support for an external interrupt
controller.
This register contains the vector spacing for interrupt handling. The vector spacing
portion of this register (bits 9..5) is initialized with the value of the _vector_spacing
symbol by the PIC32MX start-up code. All other bits are set to ‘1’.
portion of this register (bits 9..5) is initialized with the value of the _vector_spacing
symbol by the PIC32MX start-up code. All other bits are set to ‘1’.