Texas Instruments FPD Link III - DS90UB903Q & DS90UB904Q EVK SERDESUB-21USB/NOPB SERDESUB-21USB/NOPB Data Sheet

 

13 

SNLU101 – April 2012 

 

 

The USB connector J2 (mini USB) on the topside of the board provides the interface 
connection for FPD-Link III signals to the Serializer board.  Note: J5 (mini USB) on the 
bottom side is un-stuffed and not used with the cable provided in the kit. 
 
The Deserializer board is powered externally from the J8 (VDD) and J9 (VSS) connectors 
shown below.  For the Deserializer to be operational, the S1 switch – PDB must be set 
HIGH. S1-RES0, BISTEN (Normal mode) must be set LOW.  Master or slave mode is user 
selected on S1-M_S (MODE). 
 
The 2x22 pin IDC Connector J7 provides access to the 21 bit 1.8V or 3.3V LVCMOS and 
PCLK clock outputs. 
 

 

f

 

J8, J9, JP13   

c

 J5 (BACKSIDE) 

c

 

FPD-LINK III I/O

 

d

 LVCMOS OUTPUTS 

e

 

FUNCTION CONTROLS  

 

f

 

POWER SUPPLY 

g

 

I2C BUS CONTROL  

h

 

GPI 

d

J7

e

 

S1

 

d

JP10

Note: 
1) VDD and VSS MUST be 
applied externally from 
here. 
2) VDDIO = 3.3V should be 
applied separately on JP13 
with default jumper on JP12 
(VDDI=+3.3V), 
otherwise jumper VDDIO to 
+1.8V 

 

c

 J2 (TOPSIDE) 

Note: 
Connect cable 
(mini USB side) to J2  
on (TOPSIDE). 

d

JP11

 

 

h

 JP6 to JP9

g

JP4, JP5, J6