Microchip Technology Microstick for the 3V PIC24F K-series DM240013-1 DM240013-1 Data Sheet
Product codes
DM240013-1
2008-2011 Microchip Technology Inc.
DS39927C-page 271
PIC24F16KA102 FAMILY
INDEX
A
A/D
A/D Characteristics
Conversion Timing Requirements ............................ 234
Module Specifications .............................................. 235
Module Specifications .............................................. 235
A/D Converter
Analog Input Model .................................................. 181
Transfer Function ..................................................... 182
Transfer Function ..................................................... 182
AC Characteristics
Input Capture ........................................................... 244
Internal RC Accuracy ............................................... 233
Load Conditions for Device Timing
Internal RC Accuracy ............................................... 233
Load Conditions for Device Timing
Output Capture ........................................................ 244
Reset, Watchdog Timer, Oscillator Start-up Timer,
Reset, Watchdog Timer, Oscillator Start-up Timer,
Assembler
B
Baud Rate Generator
Block Diagrams
10-Bit High-Speed A/D Converter ............................ 174
16-Bit Timer1 ........................................................... 115
Accessing Program Memory with
16-Bit Timer1 ........................................................... 115
Accessing Program Memory with
CALL Stack Frame ..................................................... 41
Comparator Module ................................................. 183
Comparator Voltage Reference ............................... 187
CPU Programmer’s Model ......................................... 25
CRC Reconfigured for Polynomial ........................... 168
CRC Shifter Details .................................................. 167
CTMU Connections and Internal Configuration for
Comparator Module ................................................. 183
Comparator Voltage Reference ............................... 187
CPU Programmer’s Model ......................................... 25
CRC Reconfigured for Polynomial ........................... 168
CRC Shifter Details .................................................. 167
CTMU Connections and Internal Configuration for
2
Individual Comparator Configurations ...................... 184
Input Capture ........................................................... 123
Output Compare ...................................................... 128
PIC24F CPU Core ..................................................... 24
PIC24F16KA102 Family (General) ............................ 12
PSV Operation ........................................................... 44
Input Capture ........................................................... 123
Output Compare ...................................................... 128
PIC24F CPU Core ..................................................... 24
PIC24F16KA102 Family (General) ............................ 12
PSV Operation ........................................................... 44
Reset System ............................................................ 57
RTCC ....................................................................... 155
Shared I/O Port Structure ........................................ 113
Simplified UART ...................................................... 147
SPI1 Module (Enhanced Buffer Mode) .................... 133
SPI1 Module (Standard Buffer Mode) ..................... 132
System Clock ............................................................. 91
Timer2 (16-Bit Synchronous Mode) ......................... 119
Timer2/3 (32-Bit Mode) ............................................ 118
Timer3 (16-Bit Synchronous Mode) ......................... 119
Watchdog Timer (WDT) ........................................... 201
RTCC ....................................................................... 155
Shared I/O Port Structure ........................................ 113
Simplified UART ...................................................... 147
SPI1 Module (Enhanced Buffer Mode) .................... 133
SPI1 Module (Standard Buffer Mode) ..................... 132
System Clock ............................................................. 91
Timer2 (16-Bit Synchronous Mode) ......................... 119
Timer2/3 (32-Bit Mode) ............................................ 118
Timer3 (16-Bit Synchronous Mode) ......................... 119
Watchdog Timer (WDT) ........................................... 201
C
C Compilers
Charge Time Measurement Unit. See CTMU.
Code Examples
Code Examples
Data EEPROM Bulk Erase ........................................ 55
Data EEPROM Unlock Sequence ............................. 51
Erasing a Program Memory Row,
Data EEPROM Unlock Sequence ............................. 51
Erasing a Program Memory Row,
I/O Port Write/Read ................................................. 114
Initiating a Programming Sequence,
Initiating a Programming Sequence,
Sequence for Clock Switching ................................... 98
Setting the RTCWREN Bit ....................................... 156
Single-Word Erase .................................................... 54
Single-Word Write to Data EEPROM ........................ 55
Setting the RTCWREN Bit ....................................... 156
Single-Word Erase .................................................... 54
Single-Word Write to Data EEPROM ........................ 55
Code Protection ............................................................... 202
Comparator ...................................................................... 183
Comparator Voltage Reference ....................................... 187
Comparator ...................................................................... 183
Comparator Voltage Reference ....................................... 187
Configuration Bits ............................................................ 193
Core Features ...................................................................... 9
CPU
Core Features ...................................................................... 9
CPU
Arithmetic (Logic Unit (ALU) ...................................... 27
Control Registers ....................................................... 26
Core Registers ........................................................... 24
Programmer’s Model ................................................. 23
Control Registers ....................................................... 26
Core Registers ........................................................... 24
Programmer’s Model ................................................. 23
CRC
CTMU