Microchip Technology MCP6V01DM-VOS User Manual

MCP6V01 Input Offset Demo Board User’s Guide

DS51801A-page 6

1.3

INTENDED USE

The MCP6V01 Input Offset Demo Board is intended to provide a simple means to
measure the MCP6V01/2/3 op amp’s input offset voltage (V

) under a variety of bias

conditions. This V

includes the specified input offset voltage value found in the data

sheet plus changes due to power supply voltage (PSRR), common mode voltage
(CMRR), output voltage (A

) and temperature (

ΔV

ΔT

1.4

DESCRIPTION

Figure 1-2 shows the block diagram for the MCP6V01 Input Offset Demo Board.

FIGURE 1-2:

Block Diagram.

This circuit does the following:

• Supports Microchip’s auto-zeroed, single op amps:

- SOIC-8 package

- Used as both Device Under Test (DUT) and in a difference amplifier

• Test points for connecting lab equipment

• Single supply configuration

• The bias inputs V

, V

and GND set the conditions for the DUT

• The V

/2 Reference uses a resistor ladder to divide V

in half, then buffers that

voltage with an op amp in unity gain

• The V

Reference:

- Has a resistor divider at the input that sets V

= V

/2 when that input is left

open

- When V

is driven by an external voltage source, the resistor divider has no

effect on V

- V

is buffered

• The High Gain Feedback Network and DUT together:

- Have a noise gain of G

≈ 10.0 kV/V

- Have a common mode gain of 1 V/V

- Produce an output voltage of G

+ V

Outputs

GND

Inputs

DUT

Diff. Amp.

Reference

(buffered)

High Gain
Feedback

Network

REF