Microchip Technology Microstick for the 3V PIC24F K-series DM240013-1 DM240013-1 Data Sheet
Product codes
DM240013-1
2011 Microchip Technology Inc.
DS31037B-page 105
PIC24F16KL402 FAMILY
10.0
POWER-SAVING FEATURES
The PIC24F16KL402 family of devices provides the
ability to manage power consumption by selectively
managing clocking to the CPU and the peripherals. In
general, a lower clock frequency and a reduction in the
number of circuits being clocked constitutes lower
consumed power. All PIC24F devices manage power
consumption using several strategies:
• Clock frequency
• Instruction-based Idle and Sleep modes
• Hardware-based periodic wake-up from Sleep
• Software Controlled Doze mode
• Selective peripheral control in software
Combinations of these methods can be used to
selectively tailor an application’s power consumption,
while still maintaining critical application features, such
as timing-sensitive communications.
ability to manage power consumption by selectively
managing clocking to the CPU and the peripherals. In
general, a lower clock frequency and a reduction in the
number of circuits being clocked constitutes lower
consumed power. All PIC24F devices manage power
consumption using several strategies:
• Clock frequency
• Instruction-based Idle and Sleep modes
• Hardware-based periodic wake-up from Sleep
• Software Controlled Doze mode
• Selective peripheral control in software
Combinations of these methods can be used to
selectively tailor an application’s power consumption,
while still maintaining critical application features, such
as timing-sensitive communications.
10.1
Clock Frequency and Clock
Switching
Switching
PIC24F devices allow for a wide range of clock
frequencies to be selected under application control. If
the system clock configuration is not locked, users can
choose low-power or high-precision oscillators by simply
changing the NOSC bits. The process of changing a
system clock during operation, as well as limitations to
the process, are discussed in more detail in
frequencies to be selected under application control. If
the system clock configuration is not locked, users can
choose low-power or high-precision oscillators by simply
changing the NOSC bits. The process of changing a
system clock during operation, as well as limitations to
the process, are discussed in more detail in
.
10.2
Instruction-Based Power-Saving
Modes
Modes
PIC24F devices have two special power-saving modes
that are entered through the execution of a special
PWRSAV
that are entered through the execution of a special
PWRSAV
instruction. Sleep mode stops clock operation
and halts all code execution; Idle mode halts the CPU
and code execution, but allows peripheral modules to
continue operation.
The assembly syntax of the PWRSAV instruction is
shown in
and code execution, but allows peripheral modules to
continue operation.
The assembly syntax of the PWRSAV instruction is
shown in
.
Sleep and Idle modes can be exited as a result of an
enabled interrupt, WDT time-out or a device Reset.
When the device exits these modes, it is said to
“wake-up”.
enabled interrupt, WDT time-out or a device Reset.
When the device exits these modes, it is said to
“wake-up”.
EXAMPLE 10-1:
PWRSAV
INSTRUCTION SYNTAX
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive
reference source. For more information
on Power-Saving Features, refer to the
“PIC24F Family Reference Manual”
of this group of PIC24F devices. It is not
intended to be a comprehensive
reference source. For more information
on Power-Saving Features, refer to the
“PIC24F Family Reference Manual”
,
“Section 39. Power-Saving Features
with Deep Sleep”
with Deep Sleep”
(DS39727).
Note:
SLEEP_MODE
and IDLE_MODE are
constants, defined in the assembler
include file for the selected device.
include file for the selected device.
PWRSAV
#SLEEP_MODE
; Put the device into SLEEP mode
PWRSAV
#IDLE_MODE
; Put the device into IDLE mode