Microchip Technology MCP4725EV Data Sheet

© 2009 Microchip Technology Inc.

DS22039D-page 27

The MCP4725 device uses a two-wire I

2

C serial

interface that can operate on a standard, fast or high
speed mode. A device that sends data onto the bus is
defined as transmitter, and a device receiving data as
receiver. The bus has to be controlled by a master
device which generates the serial clock (SCL), controls
the bus access and generates the START and STOP
conditions. The MCP4725 device works as slave. Both
master and slave can operate as transmitter or
receiver, but the master device determines which mode
is activated. An example of hardware connection
diagram is shown in 

. Communication is

initiated by the master (microcontroller) which sends
the START bit, followed by the slave address byte. The
first byte transmitted is always the slave address byte,
which contains the device code, the address bits, and
the R/W bit. The device code for the MCP4725 device
is 1100. 
When the device receives a read command (R/W = 1),
it  transmits the contents of the DAC input register and
EEPROM. A non-acknowledge (NAK) or repeated
START bit can be transmitted at any time. See

 for the read operation example. If writing to

the device (R/W = 0), the device will expect write com-
mand type bits in the following byte. See 

and 

 for the write operation examples. 

The MCP4725 supports all three I

2

C operating modes:

• Standard Mode: bit rates up to 100 kbit/s
• Fast Mode: bit rates up to 400 kbit/s
• High Speed Mode (HS mode): bit rates up to 

3.4 Mbit/s

Refer to the Phillips I

2

C document for more details of

the I

2

C specifications.

The address byte is the first byte received following the
START condition from the master device. The first part
of the address byte consists of a 4-bit device code
which is set to 1100 for the MCP4725. The device code
is followed by three address bits (A2, A1, A0) which are
programmed as follows:
• The choice of A2 and A1 bits are provided by the 

customer as part of the ordering process. These 
bits are then programmed (hard-wired) during 
manufacturing

• The A2 and A1 are programmed to ‘00’ (default), 

if not requested by customer

• A0 bit is determined by the logic state of A0 pin. 

The A0 pin can be tied to V

DD

 or V

SS

, or can be 

actively driven by digital logic levels. The 
advantage of using the A0 pin is that the users 
can control the A0 bit on their application PCB 
circuit and also two identical MCP4725 devices 
can be used on the same bus line.

When the device receives an address byte, it compares
the logic state of the A0 pin with the A0 address bit
received before responding with the acknowledge bit.
The logic state of the A0 pin needs to be set prior to the
interface communication.

START bit

Read/Write bit

Address Byte

R/W ACK

Acknowledge bit

Slave Address

1

1

0

0

Slave Address for MCP4725

A2 A1 A0

Note: A2 and A1: Programmed (hard-wired) at the factory.

Please Contact Microchip Technology Inc. for A2 and
A1 programming options.
A0: Use the logic level state of A0 pin.

Device Code

Address Bits