Microchip Technology MCP4725EV Data Sheet

DS22039D-page 34

© 2009 Microchip Technology Inc.

The user can store the DAC input code (12 bits) and
power-down configuration bits (2 bits) in the internal
non-volatile EEPROM memory using the I

2

C write

command. The user can also read the EEPROM data
using the I

2

C read command. When the device is first

powered after power is shut down, the device uploads
the EEPROM contents to the DAC register
automatically and provides the DAC output
immediately. This feature is very useful in applications
where the DAC device is used to provide set point or
calibration data for other devices in the application
system. The DAC will not lose the important system
operational parameters due to the system power failure
incidents. See Section 5.6 “Non-Volatile EEPROM
Memory” for more details of the non-volatile EEPROM
memory.

The power supply to the device is used for both V

DD

and DAC reference voltage. Any noise induced on the
V

DD

 line can affect on the DAC performance. Typical

application will require a bypass capacitor in order to
filter out high frequency noise on the V

DD

 line. The

noise can be induced onto the power supply’s traces or
as a result of changes on the DAC output. The bypass
capacitor helps to minimize the effect of these noise
sources on signal integrity. 

 shows an

example of using two bypass capacitors (a 10 µF
tantalum capacitor and a 0.1 µF ceramic capacitor) in
parallel on the V

DD

 line. These capacitors should be

placed as close to the V

DD

 pin as possible (within

4 mm). 
The power source should be as clean as possible. If the
application circuit has separate digital and analog
power supplies, the V

DD

 and V

SS

 pins of the MCP4725

should reside on the analog plane.

Inductively-coupled AC transients and digital switching
noise from other devices can affect on DAC
performance and DAC output signal integrity. Careful
board layout will minimize these effects. Bench testing
has shown that a multi-layer board utilizing a low-
inductance ground plane, isolated inputs, isolated
outputs and proper decoupling are critical to achieving
the performance that the MCP4725 is capable of
providing. Particularly harsh environments may require
shielding of critical signals. Separate digital and analog
ground planes are recommended. In this case, the V

SS

pin and the ground pins of the V

DD

 capacitors of the

MCP4725 should be terminated to the analog ground
plane.

The MCP4725 is a rail-to-rail output DAC designed to
operate with a V

DD

 range of 2.7V to 5.5V. Its output

amplifier is robust enough to drive common, small-
signal loads directly, thus eliminating the cost and size
of an external buffer for most applications.

8.5.1

DC SET POINT OR CALIBRATION

A common application for the MCP4725 is a digitally-
controlled set point or a calibration of variable
parameters such as sensor offset or bias point.

 shows an example of the set point setting.

Since the MCP4725 is a 12-bit DAC and uses the V

DD

supply as a reference source, it provides a V

DD

/4096 of

resolution per step.