Microchip Technology MCP7383XRD-PPM Data Sheet
2005-2013 Microchip Technology Inc.
DS20001984F-page 11
MCP73831/2
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in
TABLE 3-1:
PIN FUNCTION TABLES
3.1
Battery Management Input Supply
(V
(V
DD
)
A supply voltage of [V
REG
(typical) + 0.3V] to 6V is
recommended. Bypass to V
SS
with a minimum of
4.7 µF.
3.2
Battery Charge Control Output
(V
(V
BAT
)
Connect to positive terminal of battery. Drain terminal
of internal P-channel MOSFET pass transistor. Bypass
to V
of internal P-channel MOSFET pass transistor. Bypass
to V
SS
with a minimum of 4.7 µF to ensure loop stability
when the battery is disconnected.
3.3
Charge Status Output (STAT)
STAT is an output for connection to an LED for charge
status indication. Alternatively, a pull-up resistor can be
applied for interfacing to a host microcontroller.
STAT is a tri-state logic output on the MCP73831 and
an open-drain output on the MCP73832.
status indication. Alternatively, a pull-up resistor can be
applied for interfacing to a host microcontroller.
STAT is a tri-state logic output on the MCP73831 and
an open-drain output on the MCP73832.
3.4
Battery Management 0V Reference
(V
(V
SS
)
Connect to negative terminal of battery and input
supply.
supply.
3.5
Current Regulation Set (PROG)
Preconditioning, fast charge and termination currents
are scaled by placing a resistor from PROG to V
are scaled by placing a resistor from PROG to V
SS
.
The charge management controller can be disabled by
allowing the PROG input to float.
allowing the PROG input to float.
3.6
Exposed Thermal Pad (EP)
An internal electrical connection exists between the
Exposed Thermal Pad (EP) and the V
Exposed Thermal Pad (EP) and the V
SS
pin. They must
be connected to the same potential on the Printed
Circuit Board (PCB).
For better thermal performance, it is recommended to
add vias from the land area of EP to a copper layer on
the other side of the PCB.
Circuit Board (PCB).
For better thermal performance, it is recommended to
add vias from the land area of EP to a copper layer on
the other side of the PCB.
Pin No.
Symbol
Function
DFN
SOT-23-5
1
4
V
DD
Battery Management Input Supply
2
—
V
DD
Battery Management Input Supply
3
3
V
BAT
Battery Charge Control Output
4
—
V
BAT
Battery Charge Control Output
5
1
STAT
Charge Status Output
6
2
V
SS
Battery Management 0V Reference
7
—
NC
No Connection
8
5
PROG
Current Regulation Set and Charge Control Enable
9
—
EP
Exposed Thermal Pad (EP); must be connected to V
SS
.