Microchip Technology DM300023 Data Sheet

Page of 18
© 2008 Microchip Technology Inc.
DS80319D-page 1
dsPIC30F1010/202X
The dsPIC30F1010/202X (Rev. A2) devices that you
received were found to conform to the specifications
and functionality described in the following documents: 
• dsPIC30F1010/202X Family Data Sheet 
(DS70178)
• dsPIC30F/33F Programmer’s Reference Manual 
(DS70157)
• dsPIC30F Family Reference Manual (DS70046)
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the devices listed below:
• dsPIC30F1010
• dsPIC30F2020
• dsPIC33F2023
dsPIC30F1010/202X Rev. A2 silicon is identified by
performing a “Reset and Connect” operation to the
device using MPLAB
®
 ICD 2 with MPLAB IDE v7.41.03
or later. The output window will show a successful
connection to the device specified in Configure>Select
Device
.
The errata described in this section will be addressed
in future revisions of silicon.
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
PWM Dead Time
If a value less than 0x0010 is written to the DTRx
and ALTDTRx registers, either or both of the
PWMHx and PWMLx outputs will not function.
2.
PWM Duty Cycle
Duty cycle resolution is not 1.1 ns over the entire
duty cycle range.
3.
PWM Triggers 
The PWM Special Event Trigger and PWM
Individual Trigger do not function near the
beginning of the PWM period.
4.
PWM Override Enable
The PWM override feature does not work
correctly.
5.
PWM Duty Cycle
When the PWM module is operated with
Immediate Duty Cycle updates enabled, any duty
cycle value less than or equal to 0x0010 causes
the PWM outputs to flip to the inverted state.
6.
PWM Override Priority
The PWM Fault, Current-Limit, and Output
Override priorities do not work correctly.
7.
PWM Jitter
The PWM output may exhibit an occasional jitter
proportional to the operating speed of the
dsPIC30F1010/202X device.
8.
ADC Global Software Trigger 
The Global Software Trigger bit (GSWTRG in the
ADCON register) is not reset unless the PxRDY
bits in the ADSTAT register are reset.
9.
ADC Sample and Hold Timing
The resolution of the PWM to ADC sample and
hold trigger timing is 41.6 ns instead of the 8 ns
specified in the device data sheet.
10. ADC Interrupts
Individual ADC Interrupts for the ADC pin pairs do
not work.
11. ADC Conversion Rate
The maximum conversion rate for the ADC module
is 1.5 Msps.
dsPIC30F1010/202X Rev. A2 Silicon Errata