Microchip Technology MCP3901EV-MCU16 Data Sheet
MCP3901
DS22192D-page 26
© 2011 Microchip Technology Inc.
5.3.2
MODULATOR INPUT RANGE AND
SATURATION POINT
SATURATION POINT
For a specified voltage reference value of 2.4V, the
modulators’ specified differential input range is
±500 mV. The input range is proportional to V
modulators’ specified differential input range is
±500 mV. The input range is proportional to V
REF
and
scales according to the V
REF
voltage. This range
ensures the stability of the modulator over amplitude
and frequency. Outside of this range, the modulator is
still functional, however, its stability is no longer
ensured, and therefore, it is not recommended to
exceed this limit. The saturation point for the modulator
is V
and frequency. Outside of this range, the modulator is
still functional, however, its stability is no longer
ensured, and therefore, it is not recommended to
exceed this limit. The saturation point for the modulator
is V
REF
/3, since the transfer function of the ADC
includes a gain of 3 by default (independent from
the PGA setting). See
the PGA setting). See
5.3.3
BOOST MODE
The Delta-Sigma modulators also include an
independent BOOST mode for each channel. If the
corresponding BOOST<1:0> bits are enabled, the
power consumption of the modulator is multiplied by 2.
Its bandwidth is increased to be able to sustain AMCLK
clock frequencies up to 8.192 MHz, while keeping the
ADC accuracy. When disabled, the power consumption
is back to normal and the AMCLK clock frequencies
can only reach up to 5 MHz without affecting ADC
accuracy.
independent BOOST mode for each channel. If the
corresponding BOOST<1:0> bits are enabled, the
power consumption of the modulator is multiplied by 2.
Its bandwidth is increased to be able to sustain AMCLK
clock frequencies up to 8.192 MHz, while keeping the
ADC accuracy. When disabled, the power consumption
is back to normal and the AMCLK clock frequencies
can only reach up to 5 MHz without affecting ADC
accuracy.
5.4
Modulator Output Block
If the user wishes to use the modulator output of the
device, the appropriate bits to enable the modulator
output must be set in the Configuration register.
device, the appropriate bits to enable the modulator
output must be set in the Configuration register.
When MODOUT<1:0> are enabled, the modulator
output of the corresponding channel is present at the
corresponding MDAT output pin as soon as the
command is placed.
output of the corresponding channel is present at the
corresponding MDAT output pin as soon as the
command is placed.
Since the Delta-Sigma modulators have a 5-level
output given by the state of 4 comparators with
thermometer coding, their outputs can be represented
on 4 bits. Each bit gives the state of the corresponding
comparator (see
output given by the state of 4 comparators with
thermometer coding, their outputs can be represented
on 4 bits. Each bit gives the state of the corresponding
comparator (see
). These bits are present on
the MOD register and are updated at the DMCLK rate.
In order to output the comparators result on a separate
pin (MDAT0 and MDAT1), these comparator output bits
have been arranged to be serially output at the AMCLK
rate (see
pin (MDAT0 and MDAT1), these comparator output bits
have been arranged to be serially output at the AMCLK
rate (see
).
This 1-bit serial bitstream is the same as what would be
produced by a 1-bit DAC modulator with a sampling
frequency of AMCLK. The modulator can either be
considered as a 5 level-output at DMCLK rate or a 1-bit
output at AMCLK rate. These two representations are
interchangeable. The MDAT outputs can, therefore, be
used in any application that requires 1-bit modulator
outputs. These applications will often integrate and
filter the 1-bit output with SINC or more complex
decimation filters computed by an MCU or a DSP.
produced by a 1-bit DAC modulator with a sampling
frequency of AMCLK. The modulator can either be
considered as a 5 level-output at DMCLK rate or a 1-bit
output at AMCLK rate. These two representations are
interchangeable. The MDAT outputs can, therefore, be
used in any application that requires 1-bit modulator
outputs. These applications will often integrate and
filter the 1-bit output with SINC or more complex
decimation filters computed by an MCU or a DSP.
FIGURE 5-2:
MDAT Serial Outputs in
Function of the Modulator Output Code.
Since the Reset and shutdown SPI commands are
asynchronous, the MDAT pins are resynchronized with
DMCLK after each time the part goes out of Reset and
shutdown.
asynchronous, the MDAT pins are resynchronized with
DMCLK after each time the part goes out of Reset and
shutdown.
This means that the first output of MDAT after Reset is
always ‘0011’ after the first DMCLK rising edge.
always ‘0011’ after the first DMCLK rising edge.
TABLE 5-2:
DELTA-SIGMA MODULATOR
CODING
CODING
Comp<3:0>
Code
Modulator
Output Code
MDAT Serial
Stream
1111
+2
1111
0111
+1
0111
0011
0
0011
0001
-1
0001
0000
-2
0000
DMCLK
MDAT+2
MDAT+1
MDAT+0
MDAT-1
MDAT-2
COMP
AMCLK
<3>
COMP
<2>
COMP
<1>
COMP
<0>