Microchip Technology MCP23X17EV Data Sheet
AN1043
DS01043A-page 2
© 2006 Microchip Technology Inc.
FIGURE 1:
I/O PORT BLOCK DIAGRAM
8/16 BIT MODE (MCP23X17 ONLY)
The MCP23X17 has the unique ability to appear to the
MCU as either two (2) 8-bit GPIO expanders, or as a
single 16-bit GPIO expander.
This is accomplished by splitting the 16 I/O ports into
two separate 8-bit I/O ports (Port A and Port B) via
IOCON.bank.
Each port has a group of dedicated registers. Table 1
shows how the register groups (Port A and Port B) are
mapped when in 8-bit or 16-bit mode.
MCU as either two (2) 8-bit GPIO expanders, or as a
single 16-bit GPIO expander.
This is accomplished by splitting the 16 I/O ports into
two separate 8-bit I/O ports (Port A and Port B) via
IOCON.bank.
Each port has a group of dedicated registers. Table 1
shows how the register groups (Port A and Port B) are
mapped when in 8-bit or 16-bit mode.
8-Bit Mode:
When in 8-bit mode, the ports’ registers are separated:
• Port A register addresses range from 00h – 0Ah
• Port B register addresses range from 10h – 1Ah
• Port A register addresses range from 00h – 0Ah
• Port B register addresses range from 10h – 1Ah
16-bit Mode:
When in 16-bit mode, the ports’ registers are
interleaved to emulate 16-bit wide registers:
• Port A and Port B register addresses range from
interleaved to emulate 16-bit wide registers:
• Port A and Port B register addresses range from
00h – 15h. The registers are still addressed as
8-bit ports, meaning that the 16-bit mapping pair
is always an even number (e.g., IODIR starts at
00h, IPOL starts at 02h, etc.)
8-bit ports, meaning that the 16-bit mapping pair
is always an even number (e.g., IODIR starts at
00h, IPOL starts at 02h, etc.)
TABLE 1:
MEMORY MAP
Note:
Unlike all other registers which are not
shared between the two ports (Port A and
Port B), there is one register (IOCON).
which is shared between the ports and
affects both equally.
shared between the two ports (Port A and
Port B), there is one register (IOCON).
which is shared between the ports and
affects both equally.
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
Input
Buffer
Buffer
OLAT or
GPIO
GPIO
IODIR
Data Bus
Write
Write
Read
Port
Port
I/O
Pad
Pad
V
DD
MCP23X08/17
8-bit Mode
16-bit Mode
Register
Name
Address
(hex)
Register
Name
Address
(hex)
IODIRA
00
IODIRA
00
IPOLA
01
IODIRB
01
GPINTENA
02
IPOLA
02
DEFVALA
03
IPOLB
03
INTCONA
04
GPINTENA
04
IOCON
05
GPINTENB
05
GPPUA
06
DEFVALA
06
INTFA
07
DEFVALB
07
INTCAPA
08
INTCONA
08
GPIOA
09
INTCONB
09
OLATA
0A
IOCON
0A
IODIRB
10
IOCON
0B
IPOLB
11
GPPUA
0C
GPINTENB
12
GPPUB
0D
DEFVALB
13
INTFA
0E
INTCONB
14
INTFB
0F
IOCON
15
INTCAPA
10
GPPUA
16
INTCAPB
11
INTFB
17
GPIOA
12
INTCAPB
18
GPIOB
13
GPIOB
19
OLATA
14
OLATB
1A
OLATB
15