Microchip Technology MA180025 Data Sheet

Page of 450
PIC18F87J90 FAMILY
DS39933D-page 126
 2010 Microchip Technology Inc.
10.5
PORTD, TRISD and 
LATD Registers
PORTD is an 8-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch registers
are TRISD and LATD. All pins on PORTD are digital only
and tolerate voltages up to 5.5V.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
Each of the PORTD pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
performed by clearing bit, RDPU (PORTG<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on all device Resets.
All of the PORTD pins are multiplexed with LCD
segment drives, controlled by bits in the LCDSE0
register. RD0 is multiplexed with the CTMU pulse
generator output.
I/O port functionality is only available when the LCD
segments are disabled.
EXAMPLE 10-4:
INITIALIZING PORTD      
Note:
These pins are configured as digital inputs
on any device Reset.
CLRF
PORTD
;
  Initialize PORTD by
 
; clearing output
 
; data latches
CLRF
LATD
; Alternate method
; to clear output
; data latches
MOVLW
 
0CFh
;
  Value used to 
; initialize data 
; direction
MOVWF
 
TRISD
;
  Set RD<3:0> as inputs
;
  RD<5:4> as outputs
;
  RD<7:6> as inputs