Microchip Technology MA180025 Data Sheet
PIC18F87J90 FAMILY
DS39933D-page 236
2010 Microchip Technology Inc.
FIGURE 18-15:
I
2
C™ SLAVE MODE TIMING WITH SEN = 1 (RECEPTION, 7-BIT ADDRESSING)
SDA
SCL
S
S
P
IF
(P
IR1<
3>
)
BF
(
S
SPS
TA
T
<
0
>
)
S
SPO
V
(
S
SPCO
N
1
<
6
>
)
S
12
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
7
8
9
P
A7
A6
A5
A
4
A
3
A
2
A1
D7
D6
D
5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D1
D0
ACK
Re
ce
iv
in
g
Da
ta
AC
K
Re
ce
ivin
g
Da
ta
R/W
=
0
ACK
Re
ce
ivin
g
Ad
dr
e
ss
Cle
a
re
d
in
so
ftwa
re
S
SPB
UF
is r
e
ad
B
u
s m
aster
ter
m
inate
s
tra
n
sfer
S
SPO
V is
s
e
t
b
e
ca
us
e
SS
PBUF
is
still fu
ll. ACK
is
not sen
t.
D2
6
CKP
CKP
wr
itte
n
to ‘
1
’ in
If B
F
is cleare
d
pr
ior to
the fa
lli
ng
ed
ge of
the 9t
h cl
ock,
CKP
w
ill n
ot b
e
r
e
se
t
to ‘
0
’ and no
cl
ock
str
e
tching
wi
ll o
ccur
softwa
re
C
lo
ck is h
e
ld
lo
w
u
n
til
C
K
P
is set to
‘1
’
Clo
ck is n
o
t h
el
d lo
w
be
cause b
u
ffer
ful
l bi
t i
s
cl
ea
r pr
io
r to
fal
ling ed
ge
of
9th cl
ock
Clo
ck is n
ot h
e
ld
lo
w
beca
use A
C
K
=
1
B
F
is set aft
e
r fa
llin
g
edge o
f the 9
th cl
ock,
CK
P
is rese
t to ‘
0
’ a
nd
clo
ck str
e
tc
hing occu
rs