Microchip Technology MA180025 Data Sheet
2010 Microchip Technology Inc.
DS39933D-page 241
PIC18F87J90 FAMILY
18.4.7
BAUD RATE
In I
2
C Master mode, the Baud Rate Generator (BRG)
reload value is placed in the lower 7 bits of the
SSPADD register (Figure 18-19). When a write occurs
to SSPBUF, the Baud Rate Generator will automatically
begin counting. The BRG counts down to 0 and stops
until another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
SSPADD register (Figure 18-19). When a write occurs
to SSPBUF, the Baud Rate Generator will automatically
begin counting. The BRG counts down to 0 and stops
until another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
CY
) on the
Q2 and Q4 clocks. In I
2
C Master mode, the BRG is
reloaded automatically.
Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK), the internal
clock will automatically stop counting and the SCL pin
will remain in its last state.
Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK), the internal
clock will automatically stop counting and the SCL pin
will remain in its last state.
18.4.7.1
Baud Rate Generation in
Power-Managed Modes
Power-Managed Modes
When the device is operating in one of the
power-managed modes, the clock source to the BRG
may change frequency, or even stop, depending on the
mode and clock source selected. Switching to a Run or
Idle mode from either the secondary clock or internal
oscillator is likely to change the clock rate to the BRG.
In Sleep mode, the BRG will not be clocked at all.
power-managed modes, the clock source to the BRG
may change frequency, or even stop, depending on the
mode and clock source selected. Switching to a Run or
Idle mode from either the secondary clock or internal
oscillator is likely to change the clock rate to the BRG.
In Sleep mode, the BRG will not be clocked at all.
FIGURE 18-19:
BAUD RATE GENERATOR BLOCK DIAGRAM
TABLE 18-3:
I
2
C™ CLOCK RATE w/BRG
F
CY
F
CY
* 2
BRG Value
F
SCL
(2 Rollovers of BRG)
10 MHz
20 MHz
18h
400 kHz
10 MHz
20 MHz
1Fh
312.5 kHz
10 MHz
20 MHz
63h
100 kHz
4 MHz
8 MHz
09h
400 kHz
4 MHz
8 MHz
0Ch
308 kHz
4 MHz
8 MHz
27h
100 kHz
1 MHz
2 MHz
02h
333 kHz
1 MHz
2 MHz
09h
100 kHz
1 MHz
2 MHz
00h
1 MHz
SSPM<3:0>
BRG Down Counter
CLKO
F
OSC
/4
SSPADD<6:0>
SSPM<3:0>
SCL
Reload
Control
Control
Reload