Microchip Technology MA180025 Data Sheet
PIC18F87J90 FAMILY
DS39933D-page 282
2010 Microchip Technology Inc.
20.3.2
AUSART ASYNCHRONOUS
RECEIVER
RECEIVER
The receiver block diagram is shown in Figure 20-4.
The data is received on the RX2 pin and drives the data
recovery block. The data recovery block is actually a
high-speed shifter operating at x16 times the baud rate,
whereas the main receive serial shifter operates at the
bit rate or at F
The data is received on the RX2 pin and drives the data
recovery block. The data recovery block is actually a
high-speed shifter operating at x16 times the baud rate,
whereas the main receive serial shifter operates at the
bit rate or at F
OSC
. This mode would typically be used
in RS-232 systems.
To set up an Asynchronous Reception:
1.
To set up an Asynchronous Reception:
1.
Initialize the SPBRG2 register for the appropriate
baud rate. Set or clear the BRGH bit, as required,
to achieve the desired baud rate.
baud rate. Set or clear the BRGH bit, as required,
to achieve the desired baud rate.
2.
Enable the asynchronous serial port by clearing
bit, SYNC, and setting bit, SPEN.
bit, SYNC, and setting bit, SPEN.
3.
If interrupts are desired, set enable bit, RC2IE.
4.
If 9-bit reception is desired, set bit, RX9.
5.
Enable the reception by setting bit, CREN.
6.
Flag bit, RC2IF, will be set when reception is
complete and an interrupt will be generated if
enable bit, RC2IE, was set.
complete and an interrupt will be generated if
enable bit, RC2IE, was set.
7.
Read the RCSTA2 register to get the 9th bit (if
enabled) and determine if any error occurred
during reception.
enabled) and determine if any error occurred
during reception.
8.
Read the 8-bit received data by reading the
RCREG2 register.
RCREG2 register.
9.
If any error occurred, clear the error by clearing
enable bit, CREN.
enable bit, CREN.
10. If using interrupts, ensure that the GIE and PEIE
bits in the INTCON register (INTCON<7:6>) are
set.
set.
20.3.3
SETTING UP 9-BIT MODE WITH
ADDRESS DETECT
ADDRESS DETECT
This mode would typically be used in RS-485 systems.
To set up an Asynchronous Reception with Address
Detect Enable:
1.
To set up an Asynchronous Reception with Address
Detect Enable:
1.
Initialize the SPBRG2 register for the appropriate
baud rate. Set or clear the BRGH and BRG16
bits, as required, to achieve the desired baud
rate.
baud rate. Set or clear the BRGH and BRG16
bits, as required, to achieve the desired baud
rate.
2.
Enable the asynchronous serial port by clearing
the SYNC bit and setting the SPEN bit.
the SYNC bit and setting the SPEN bit.
3.
If interrupts are required, set the RCEN bit and
select the desired priority level with the RC2IP
bit.
select the desired priority level with the RC2IP
bit.
4.
Set the RX9 bit to enable 9-bit reception.
5.
Set the ADDEN bit to enable address detect.
6.
Enable reception by setting the CREN bit.
7.
The RC2IF bit will be set when reception is
complete. The interrupt will be Acknowledged if
the RC2IE and GIE bits are set.
complete. The interrupt will be Acknowledged if
the RC2IE and GIE bits are set.
8.
Read the RCSTA2 register to determine if any
error occurred during reception, as well as read
bit 9 of data (if applicable).
error occurred during reception, as well as read
bit 9 of data (if applicable).
9.
Read RCREG2 to determine if the device is
being addressed.
being addressed.
10. If any error occurred, clear the CREN bit.
11. If the device has been addressed, clear the
11. If the device has been addressed, clear the
ADDEN bit to allow all received data into the
receive buffer and interrupt the CPU.
receive buffer and interrupt the CPU.
FIGURE 20-4:
AUSART RECEIVE BLOCK DIAGRAM
x64 Baud Rate CLK
Baud Rate Generator
RX2
Pin Buffer
and Control
SPEN
Data
Recovery
CREN
OERR
FERR
RSR Register
MSb
LSb
RX9D
RCREG2 Register
FIFO
Interrupt
RC2IF
RC2IE
Data Bus
8
64
16
or
Stop
Start
(8)
7
1
0
RX9
SPBRG2
or
4