Microchip Technology MCP4728EV Data Sheet

DS22187E-page 28

© 2010 Microchip Technology Inc.

Each channel has two modes of operation: (a) Normal
mode where analog voltage is available and (b)
Power-Down mode which turns off most of the internal
circuits for power savings.

The user can select the operating mode of each
channel individually by setting the Power-Down
selection bits (PD1 and PD0). For example, the user
can select Normal mode for channel A while selecting
Power-Down mode for all other channels.

See 

 for more details on the

writing the power-down bits.

Most of the internal circuit in the powered down
channel are turned off. However, the internal voltage
reference circuit is not affected by the Power-Down
mode. The internal voltage reference circuit is turned
off only if all channels select external reference (V

REF

= V

DD

). 

• The powered down channel stays in a 

power-saving condition by turning off most of its 
circuits

• No analog voltage output at the powered down 

channel

• The output (V

OUT

) pin of the powered down 

channel is switched to a known resistive load. The 
value of the resistive load is determined by the 
state of the Power-Down bits (PD1 and PD0). 

 shows the outcome of the Power-Down 

bit settings

• The contents of both the DAC registers and 

EEPROM are not changed

• Draws less than

 40 nA (typical) when all four 

channels are powered down and V

DD

 is selected 

as the voltage reference

• The  I

2

C serial interface circuits remain active in 

order to receive any command from the Master

•  The internal voltage reference circuit stays 

turned-on if it is selected as reference by at least 
one channel

The device exits Power-Down mode immediately by
the following commands:

• Any write command for normal mode. Only 

selected channel is affected

•   I

2

C General Call Wake-Up Command. All 

channels are affected

• I

2

C General Call Reset Command. This is a 

conditional case. The device exits Power-Down 
mode, depending on the Power-Down bit settings 
in EEPROM as the configuration bits and DAC 
input codes are uploaded from EEPROM. All 
channels are affected

When the DAC operation mode is changed from the
Power-Down to Normal mode, there will be a time
delay until the analog output is available. Typical time
delay for the output voltage is approximately 4.5 µs.
This time delay is measured from the acknowledge
pulse of the I

2

C serial communication command to the

beginning of the analog output (V

OUT

). This time delay

is not included in the output settling time specification.
See 

 for

more details. 

0

0

Normal Mode

0

1

1 k

Ω resistor to ground (

1

0

100 k

Ω resistor to ground 

1

1

500 k

Ω resistor to ground 

Note 1: In Power-Down mode: V

OUT

 is off and 

most of internal circuits in the selected 
channel are disabled.

1 k

Ω

100 k

Ω 500 kΩ

Power-Down

Control Circuit

Resistive

Load

V

OUT

OP

Amp

Resistor String DAC