Microchip Technology AC164336 Data Sheet

 2006-2014 Microchip Technology Inc.

DS70000178D-page 1

• Modified Harvard architecture

• C compiler optimized instruction set architecture

• 83 base instructions with flexible addressing 

modes

• 24-bit wide instructions, 16-bit wide data path

• 12 Kbytes on-chip Flash program space

• 512 bytes on-chip data RAM

• 16 x 16-bit working register array

• Up to 30 MIPS operation:

- Dual Internal RC

- 9.7 and 14.55 MHz (±1%) Industrial Temp

- 6.4 and 9.7 MHz (±1%) Extended Temp

- 32X PLL with 480 MHz VCO

- PLL inputs ±3%

- External EC clock 6.0 to 14.55 MHz

- HS Crystal mode 6.0 to 14.55 MHz

• 32 interrupt sources

• Three external interrupt sources

• 8 user-selectable priority levels for each interrupt

• 4 processor exceptions and software traps

• Modulo and Bit-Reversed modes

• Two 40-bit wide accumulators with optional 

saturation logic

• 17-bit x 17-bit single-cycle hardware fractional/

integer multiplier

• Single-cycle Multiply-Accumulate (MAC) 

operation

• 40-stage Barrel Shifter

• Dual data fetch

• High-current sink/source I/O pins: 25 mA/25 mA

• Three 16-bit timers/counters; optionally pair up 

16-bit timers into 32-bit timer modules

• One 16-bit Capture input functions

• Two 16-bit Compare/PWM output functions

- Dual Compare mode available

• 3-wire SPI modules (supports 4 Frame modes)

• I

2

C

TM

 module supports Multi-Master/Slave mode 

and 7-bit/10-bit addressing

• UART Module:

- Supports RS-232, RS-485 and LIN 1.2

- Supports IrDA

®

 with on-chip hardware endec

- Auto wake-up on Start bit

- Auto-Baud Detect

- 4-level FIFO buffer

• Four PWM generators with 8 outputs

• Each PWM generator has independent time base 

and duty cycle

• Duty cycle resolution of 1.1 ns at 30 MIPS

• Individual dead time for each PWM generator:

- Dead-time resolution 4.2 ns at 30 MIPS

- Dead time for rising and falling edges

• Phase-shift resolution of 4.2 ns @ 30 MIPS

• Frequency resolution of 8.4 ns @ 30 MIPS

• PWM modes supported:

- Complementary

- Push-Pull

- Multi-Phase

- Variable Phase

- Current Reset

- Current-Limit

• Independent Current-Limit and Fault Inputs

• Output Override Control

• Special Event Trigger

• PWM generated ADC Trigger

Note:  This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046). For more information on the device
instruction set and programming, refer to the “dsPIC30F/
33F Programmer’s Reference Manual” (DS70157).