Microchip Technology MA320001 Data Sheet
© 2011 Microchip Technology Inc.
DS61143H-page 153
PIC32MX3XX/4XX
TABLE 29-5:
DC CHARACTERISTICS: OPERATING CURRENT (I
DD
)
DC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
≤ T
A
≤ +85°C for Industrial
-40°C
≤ T
A
≤ +105°C for V-Temp
Param.
No.
Typical
(3)
Max.
Units
Conditions
Operating Current (I
DD
)
(1,2)
DC20
8.5
13
mA
Code executing from Flash
-40ºC,
+25ºC,
+85ºC
—
4 MHz
9
15
+105ºC
DC20c
4.0
—
mA
Code executing from SRAM
—
DC21
23.5
32
mA
Code executing from Flash
—
—
20 MHz
(Note 4)
DC21c
16.4
—
mA
Code executing from SRAM
DC22
48
61
mA
Code executing from Flash
—
—
60 MHz
(Note 4)
DC22c
45
—
mA
Code executing from SRAM
DC23
55
75
mA
Code executing from Flash
-40ºC,
+25ºC,
+85ºC
2.3V
80 MHz
60
100
+105ºC
DC23c
55
—
mA
Code executing from SRAM
—
—
DC24
—
100
µA
—
-40°C
2.3V
LPRC (31 kHz)
(Note 4)
DC24a
—
130
µA
—
+25°C
DC24b
—
670
µA
—
+85°C
DC24c
—
850
µA
—
+105ºC
DC25
94
—
µA
—
-40°C
3.3V
DC25a
125
—
µA
—
+25°C
DC25b
302
—
µA
—
+85°C
DC25d
400
—
µA
—
+105ºC
DC25c
71
—
µA
Code executing from SRAM
—
—
DC26
—
110
µA
—
-40°C
3.6V
DC26a
—
180
µA
—
+25°C
DC26b
—
700
µA
—
+85°C
DC26c
—
900
µA
—
+105ºC
Note 1:
A device’s I
DD
supply current is mainly a function of the operating voltage and frequency. Other factors,
such as PBCLK (Peripheral Bus Clock) frequency, number of peripheral modules enabled, internal code
execution pattern, execution from program Flash memory vs. SRAM, I/O pin loading and switching rate,
oscillator type as well as temperature can have an impact on the current consumption.
execution pattern, execution from program Flash memory vs. SRAM, I/O pin loading and switching rate,
oscillator type as well as temperature can have an impact on the current consumption.
2:
The test conditions for I
DD
measurements are as follows: Oscillator mode = EC+PLL with OSC1 driven by
external square wave from rail to rail and PBCLK divisor = 1:8. CPU, Program Flash and SRAM data
memory are operational, Program Flash memory Wait states = 7, program cache and prefetch are dis-
abled and SRAM data memory Wait states = 1. All peripheral modules are disabled (ON bit = 0). WDT
and FSCM are disabled. All I/O pins are configured as inputs and pulled to V
memory are operational, Program Flash memory Wait states = 7, program cache and prefetch are dis-
abled and SRAM data memory Wait states = 1. All peripheral modules are disabled (ON bit = 0). WDT
and FSCM are disabled. All I/O pins are configured as inputs and pulled to V
SS
. MCLR = V
DD
.
3:
Data in “Typical” column is at 3.3V, 25°C at specified operating frequency unless otherwise stated.
Parameters are for design guidance only and are not tested.
Parameters are for design guidance only and are not tested.
4:
This parameter is characterized, but not tested in manufacturing.