Microchip Technology MA180023 Data Sheet

Page of 536
PIC18F46J11 FAMILY
DS39932D-page 272
 
 2011 Microchip Technology Inc.
19.2
Control Registers
Each MSSP module has three associated control
registers. These include a status register (SSPxSTAT)
and two control registers (SSPxCON1 and SSPxCON2).
The use of these registers and their individual Configura-
tion bits differ significantly depending on whether the
MSSP module is operated in SPI or I
2
C mode.
Additional details are provided under the individual
sections.
19.3
SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported.
When MSSP2 is used in SPI mode, it can optionally be
configured to work with the SPI DMA submodule
described in 
.
To accomplish communication, typically three pins are
used:
• Serial Data Out (SDOx) – RC5/SDO1/RP16 or 
SDO2/Remappable
• Serial Data In (SDIx) – RC4/SDI1/SDA1/RP15 or 
SDI2/Remappable
• Serial Clock (SCKx) – RC3/SCK1/SCL1/RP14 or 
SCK2/Remappable
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SSx) – RA5/AN4/SS1/
HLVDIN/RP2 or SS2/Remappable
 depicts the block diagram of the MSSP
module when operating in SPI mode. 
FIGURE 19-1:
MSSPx BLOCK DIAGRAM 
(SPI MODE)    
Note:
In devices with more than one MSSP
module, it is very important to pay close
attention to the SSPxCON register
names. SSP1CON1 and SSP1CON2
control different operational aspects of the
same module, while SSP1CON1 and
SSP2CON1 control the same features for
two different modules. 
(  
        )
Read
Write
Internal
Data Bus
SSPxSR reg
SSPM<3:0>
bit 0
Shift
Clock
SSx Control
Enable
Edge
Select
Clock Select
TMR2 Output
T
OSC
Prescaler
4, 16, 64
2
Edge
Select
2
4
Data to TXx/RXx in SSPxSR
TRIS bit
2
SMP:CKE
SDOx
SSPxBUF reg
SDIx
SSx
SCKx
Note:
Only port I/O names are used in this diagram for
the sake of brevity. Refer to the text for a full list of
multiplexed functions.