Microchip Technology MA240017 Data Sheet

Page of 278
 2008-2011 Microchip Technology Inc.
DS39927C-page 153
PIC24F16KA102 FAMILY
bit 5
ADDEN:
 Address Character Detect bit (bit 8 of received data = 1)
1
 = Address Detect mode is enabled. If 9-bit mode is not selected, this does not take effect.
0
 = Address Detect mode is disabled
bit 4
RIDLE:
 Receiver Idle bit (read-only)
1
 = Receiver is Idle
0
 = Receiver is active
bit 3
PERR:
 Parity Error Status bit (read-only)
1
 = Parity error has been detected for the current character (character at the top of the receive FIFO)
0
 = Parity error has not been detected
bit 2
FERR:
 Framing Error Status bit (read-only)
1
 = Framing error has been detected for the current character (character at the top of the receive FIFO)
0
 = Framing error has not been detected
bit 1
OERR:
 Receive Buffer Overrun Error Status bit (clear/read-only)
1
 = Receive buffer has overflowed
0
 = Receive buffer has not overflowed (clearing a previously set OERR bit (1
 0 transition) will reset
the receiver buffer and the RSR to the empty state)
bit 0
URXDA:
 Receive Buffer Data Available bit (read-only)
1
 = Receive buffer has data; at least one more character can be read
0
 = Receive buffer is empty
REGISTER 18-2:
UxSTA: UARTx STATUS AND CONTROL REGISTER (CONTINUED)