Microchip Technology MA240017 Data Sheet
PIC24F16KA102 FAMILY
DS39927C-page 158
2008-2011 Microchip Technology Inc.
bit 7-0
CAL<7:0>:
RTC Drift Calibration bits
01111111
= Maximum positive adjustment; adds 508 RTC clock pulses every one minute
.
.
.
01111111
.
.
01111111
= Minimum positive adjustment; adds 4 RTC clock pulses every one minute
00000000
= No adjustment
11111111
= Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
.
.
.
10000000
.
.
10000000
= Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
REGISTER 19-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER
(
1
)
(CONTINUED)
Note 1:
The RCFGCAL register is only affected by a POR.
2:
A write to the RTCEN bit is only allowed when RTCWREN = 1.
3:
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
REGISTER 19-2:
PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
—
—
—
SMBUSDEL
OC1TRIS
RTSECSEL1
RTSECSEL0
—
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-5
Unimplemented:
Read as ‘0’
bit 4-3
Described in
and
.
bit 2-1
RTSECSEL<1:0>:
RTCC Seconds Clock Output Select bits
(
)
11
= Reserved; do not use
10
= RTCC source clock is selected for the RTCC pin (can be LPRC or SOSC, depending on the
RTCOSC (FDS<5>) bit setting)
01
= RTCC seconds clock is selected for the RTCC pin
00
= RTCC alarm pulse is selected for the RTCC pin
bit 0
Unimplemented:
Read as ‘0’
Note 1:
To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit needs to be set.