Microchip Technology MA240017 Data Sheet
2008-2011 Microchip Technology Inc.
DS39927C-page 29
PIC24F16KA102 FAMILY
4.0
MEMORY ORGANIZATION
As with Harvard architecture devices, the PIC24F
microcontrollers feature separate program and data
memory space and busing. This architecture also
allows the direct access of program memory from the
data space during code execution.
microcontrollers feature separate program and data
memory space and busing. This architecture also
allows the direct access of program memory from the
data space during code execution.
4.1
Program Address Space
The program address memory space of the PIC24F
devices is 4M instructions. The space is addressable by
a 24-bit value derived from either the 23-bit Program
Counter (PC) during program execution, or from a table
operation or data space remapping, as described in
devices is 4M instructions. The space is addressable by
a 24-bit value derived from either the 23-bit Program
Counter (PC) during program execution, or from a table
operation or data space remapping, as described in
The user access to the program memory space is
restricted to the lower half of the address range
(000000h to 7FFFFFh). The exception is the use of
TBLRD/TBLWT
restricted to the lower half of the address range
(000000h to 7FFFFFh). The exception is the use of
TBLRD/TBLWT
operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
Memory maps for the PIC24F16KA102 family of
devices are displayed in
sections of the configuration memory space.
Memory maps for the PIC24F16KA102 family of
devices are displayed in
.
FIGURE 4-1:
PROGRAM SPACE MEMORY MAP FOR PIC24F16KA102 FAMILY DEVICES
000000h
0000FEh
000002h
000100h
F80010h
F80012h
FEFFFEh
FFFFFFh
000004h
000200h
0001FEh
000104h
C
on
fig
u
rat
io
n M
em
or
y S
pace
U
ser
M
emo
ry
S
pac
e
Note:
Memory areas are not displayed to scale.
Reset Address
Device Config Registers
DEVID (2)
GOTO
Instruction
Reserved
Alternate Vector Table
Reserved
Interrupt Vector Table
PIC24F16KA10X
FF0000h
F7FFFEh
F80000h
800000h
7FFFFFh
Reserved
Unimplemented
Read ‘0’
Reset Address
DEVID (2)
GOTO
Instruction
Reserved
Alternate Vector Table
Reserved
Interrupt Vector Table
PIC24F08KA10X
Device Config Registers
Reserved
Unimplemented
Read ‘0’
0015FEh
002BFE
User Flash
Program Memory
(5632 instructions)
7FFE00h
Data EEPROM
Data EEPROM
Flash
Program Memory
(2816 instructions)