Microchip Technology MA240017 Data Sheet
PIC24F16KA102 FAMILY
DS39927C-page 42
2008-2011 Microchip Technology Inc.
TABLE 4-24:
PROGRAM SPACE ADDRESS CONSTRUCTION
FIGURE 4-5:
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
Access Type
Access
Space
Program Space Address
<23>
<22:16>
<15>
<14:1>
<0>
Instruction Access
(Code Execution)
(Code Execution)
User
0
PC<22:1>
0
0xx xxxx xxxx xxxx xxxx xxx0
TBLRD/TBLWT
(Byte/Word Read/Write)
(Byte/Word Read/Write)
User
TBLPAG<7:0>
Data EA<15:0>
0xxx xxxx
xxxx xxxx xxxx xxxx
Configuration TBLPAG<7:0>
Data
EA<15:0>
1xxx xxxx
xxxx xxxx xxxx xxxx
Program Space Visibility
(Block Remap/Read)
(Block Remap/Read)
User
0
PSVPAG<7:0>
(
)
Data EA<14:0>
(
)
0
xxxx xxxx
xxx xxxx xxxx xxxx
Note 1:
Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
the address is PSVPAG<0>.
2:
PSVPAG can have only two values (‘00’ to access program memory and FF to access data EEPROM) on
the PIC24F16KA102 family.
the PIC24F16KA102 family.
0
Program Counter
23 Bits
1
PSVPAG
8 Bits
EA
15 Bits
Program Counter
(1)
Select
TBLPAG
8 Bits
EA
16 Bits
Byte Select
0
0
1/0
User/Configuration
Table Operations
(2)
Program Space Visibility
(1)
Space Select
24 Bits
23 Bits
(Remapping)
1/0
0
Note 1:
The LSb of program space addresses is always fixed as ‘0’ in order to maintain word alignment of data in the
program and data spaces.
program and data spaces.
2:
Table operations are not required to be word-aligned. Table read operations are permitted in the configuration
memory space.
memory space.