Microchip Technology MA240017 Data Sheet
2008-2011 Microchip Technology Inc.
DS39927C-page 69
PIC24F16KA102 FAMILY
REGISTER 8-3:
INTCON1: INTERRUPT CONTROL REGISTER 1
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
NSTDIS
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
R/W-0, HS
R/W-0, HS
R/W-0, HS
R/W-0, HS
U-0
—
—
—
MATHERR
ADDRERR
STKERR
OSCFAIL
—
bit 7
bit 0
Legend:
HS = Hardware Settable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
NSTDIS:
Interrupt Nesting Disable bit
1
= Interrupt nesting is disabled
0
= Interrupt nesting is enabled
bit 14-5
Unimplemented:
Read as ‘0’
bit 4
MATHERR:
Arithmetic Error Trap Status bit
1
= Overflow trap has occurred
0
= Overflow trap has not occurred
bit 3
ADDRERR:
Address Error Trap Status bit
1
= Address error trap has occurred
0
= Address error trap has not occurred
bit 2
STKERR:
Stack Error Trap Status bit
1
= Stack error trap has occurred
0
= Stack error trap has not occurred
bit 1
OSCFAIL:
Oscillator Failure Trap Status bit
1
= Oscillator failure trap has occurred
0
= Oscillator failure trap has not occurred
bit 0
Unimplemented:
Read as ‘0’