Microchip Technology MA240017 Data Sheet
PIC24F16KA102 FAMILY
DS39927C-page 92
2008-2011 Microchip Technology Inc.
9.1
CPU Clocking Scheme
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSCI and OSCO
four sources:
• Primary Oscillator (POSC) on the OSCI and OSCO
pins
• Secondary Oscillator (SOSC) on the SOSCI and
SOSCO pins
The PIC24F16KA102 family devices consist of two
types of secondary oscillator:
- High-Power Secondary Oscillator
- Low-Power Secondary Oscillator
These can be selected by using the SOSCSEL
(FOSC<5>) bit.
The PIC24F16KA102 family devices consist of two
types of secondary oscillator:
- High-Power Secondary Oscillator
- Low-Power Secondary Oscillator
These can be selected by using the SOSCSEL
(FOSC<5>) bit.
• Fast Internal RC (FRC) Oscillator
- 8 MHz FRC Oscillator
- 500 kHz Lower Power FRC Oscillator
- 500 kHz Lower Power FRC Oscillator
• Low-Power Internal RC (LPRC) Oscillator
The primary oscillator and 8 MHz FRC sources have
the option of using the internal 4x PLL. The frequency
of the FRC clock source can optionally be reduced by
the programmable clock divider. The selected clock
source generates the processor and peripheral clock
sources.
The processor clock source is divided by two to produce
the internal instruction cycle clock, F
The primary oscillator and 8 MHz FRC sources have
the option of using the internal 4x PLL. The frequency
of the FRC clock source can optionally be reduced by
the programmable clock divider. The selected clock
source generates the processor and peripheral clock
sources.
The processor clock source is divided by two to produce
the internal instruction cycle clock, F
CY
. In this docu-
ment, the instruction cycle clock is also denoted by
F
F
OSC
/2. The internal instruction cycle clock, F
OSC
/2, can
be provided on the OSCO I/O pin for some operating
modes of the primary oscillator.
modes of the primary oscillator.
9.2
Initial Configuration on POR
The oscillator source (and operating mode) that is used
at a device Power-on Reset (POR) event is selected
using Configuration bit settings. The Oscillator
Configuration bit settings are located in the Configuration
registers in the program memory (refer to
at a device Power-on Reset (POR) event is selected
using Configuration bit settings. The Oscillator
Configuration bit settings are located in the Configuration
registers in the program memory (refer to
for further details). The Primary
Oscillator Configuration bits, POSCMD<1:0>
(FOSC<1:0>), and the Initial Oscillator Select Configura-
tion bits, FNOSC<2:0> (FOSCSEL<2:0>), select the
oscillator source that is used at a POR. The FRC Primary
Oscillator with Postscaler (FRCDIV) is the default (unpro-
grammed) selection. The secondary oscillator, or one of
the internal oscillators, may be chosen by programming
these bit locations. The EC mode frequency range
Configuration bits, POSCFREQ<1:0> (FOSC<4:3>),
optimize power consumption when running in EC
mode. The default configuration is “frequency range is
greater than 8 MHz”.
The Configuration bits allow users to choose between
the various clock modes, shown in
(FOSC<1:0>), and the Initial Oscillator Select Configura-
tion bits, FNOSC<2:0> (FOSCSEL<2:0>), select the
oscillator source that is used at a POR. The FRC Primary
Oscillator with Postscaler (FRCDIV) is the default (unpro-
grammed) selection. The secondary oscillator, or one of
the internal oscillators, may be chosen by programming
these bit locations. The EC mode frequency range
Configuration bits, POSCFREQ<1:0> (FOSC<4:3>),
optimize power consumption when running in EC
mode. The default configuration is “frequency range is
greater than 8 MHz”.
The Configuration bits allow users to choose between
the various clock modes, shown in
9.2.1
CLOCK SWITCHING MODE
CONFIGURATION BITS
CONFIGURATION BITS
The FCKSM Configuration bits (FOSC<7:6>) are used
jointly to configure device clock switching and the
FSCM. Clock switching is enabled only when FCKSM1
is programmed (‘0’). The FSCM is enabled only when
FCKSM<1:0> are both programmed (‘00’).
jointly to configure device clock switching and the
FSCM. Clock switching is enabled only when FCKSM1
is programmed (‘0’). The FSCM is enabled only when
FCKSM<1:0> are both programmed (‘00’).
TABLE 9-1:
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
Oscillator Mode
Oscillator Source
POSCMD<1:0>
FNOSC<2:0>
Note
8 MHz FRC Oscillator with Postscaler
(FRCDIV)
(FRCDIV)
Internal
11
111
500 MHz FRC Oscillator with Postscaler
(LPFRCDIV)
(LPFRCDIV)
Internal
11
110
Low-Power RC Oscillator (LPRC)
Internal
11
101
Secondary (Timer1) Oscillator (SOSC)
Secondary
00
100
Primary Oscillator (HS) with PLL Module
(HSPLL)
(HSPLL)
Primary
10
011
Primary Oscillator (EC) with PLL Module
(ECPLL)
(ECPLL)
Primary
00
011
Primary Oscillator (HS)
Primary
10
010
Primary Oscillator (XT)
Primary
01
010
Primary Oscillator (EC)
Primary
00
010
8 MHz FRC Oscillator with PLL Module
(FRCPLL)
(FRCPLL)
Internal
11
001
8 MHz FRC Oscillator (FRC)
Internal
11
000
Note 1:
OSCO pin function is determined by the OSCIOFNC Configuration bit.
2:
This is the default oscillator mode for an unprogrammed (erased) device.