Microchip Technology MA320002 Data Sheet
PIC32MX3XX/4XX
DS61143H-page 40
© 2011 Microchip Technology Inc.
Coprocessor 0 also contains the logic for identifying
and managing exceptions. Exceptions can be caused
by a variety of sources, including alignment errors in
data, external events or program errors.
and managing exceptions. Exceptions can be caused
by a variety of sources, including alignment errors in
data, external events or program errors.
shows the exception types in order of priority.
17-22
Reserved
Reserved
23
Debug
(2)
Debug control and exception status
24
DEPC
(2)
Program counter at last debug exception
25-29
Reserved
Reserved
30
ErrorEPC
(1)
Program counter at last error
31
DESAVE
(2)
Debug handler scratchpad register
Note 1:
Registers used in exception processing.
2:
Registers used during debug.
TABLE 3-2:
COPROCESSOR 0 REGISTERS (CONTINUED)
Register
Number
Register
Name
Name
Function
TABLE 3-3:
PIC32MX3XX/4XX FAMILY CORE EXCEPTION TYPES
Exception
Description
Reset
Assertion MCLR or a Power-on Reset (POR)
DSS
EJTAG Debug Single Step
DINT
EJTAG Debug Interrupt. Caused by the assertion of the external EJ_DINT input, or by setting the
EjtagBrk bit in the ECR register
EjtagBrk bit in the ECR register
NMI
Assertion of NMI signal
Interrupt
Assertion of unmasked hardware or software interrupt signal
DIB
EJTAG debug hardware instruction break matched
AdEL
Fetch address alignment error
Fetch reference to protected address
Fetch reference to protected address
IBE
Instruction fetch bus error
DBp
EJTAG Breakpoint (execution of SDBBP instruction)
Sys
Execution of SYSCALL instruction
Bp
Execution of BREAK instruction
RI
Execution of a Reserved Instruction
CpU
Execution of a coprocessor instruction for a coprocessor that is not enabled
CEU
Execution of a CorExtend instruction when CorExtend is not enabled
Ov
Execution of an arithmetic instruction that overflowed
Tr
Execution of a trap (when trap condition is true)
DDBL/DDBS
EJTAG Data Address Break (address only) or EJTAG Data Value Break on Store (address + value)
AdEL
Load address alignment error
Load reference to protected address
Load reference to protected address
AdES
Store address alignment error
Store to protected address
Store to protected address
DBE
Load or store bus error
DDBL
EJTAG data hardware breakpoint matched in load data compare