Microchip Technology AC164337 Data Sheet
dsPIC30F1010/202X
DS70000178D-page 104
2006-2014 Microchip Technology Inc.
FIGURE 11-1:
PWM OUTPUT TIMING
11.7
Output Compare Interrupts
The output compare channels have the ability to gener-
ate an interrupt on a compare match, for whichever
Match mode has been selected.
ate an interrupt on a compare match, for whichever
Match mode has been selected.
For all modes except the PWM mode, when a compare
event occurs, the respective interrupt flag (OCxIF) is
asserted and an interrupt will be generated, if enabled.
The OCxIF bit is located in the corresponding IFS
STATUS register, and must be cleared in software. The
interrupt is enabled via the respective compare inter-
rupt enable (OCxIE) bit, located in the corresponding
IEC Control register.
event occurs, the respective interrupt flag (OCxIF) is
asserted and an interrupt will be generated, if enabled.
The OCxIF bit is located in the corresponding IFS
STATUS register, and must be cleared in software. The
interrupt is enabled via the respective compare inter-
rupt enable (OCxIE) bit, located in the corresponding
IEC Control register.
For the PWM mode, when an event occurs, the respec-
tive timer interrupt flag (T2IF or T3IF) is asserted and
an interrupt will be generated, if enabled. The IF bit is
located in the IFS0 STATUS register, and must be
cleared in software. The interrupt is enabled via the
respective timer interrupt enable bit (T2IE or T3IE),
located in the IEC0 Control register. The output com-
pare interrupt flag is never set during the PWM mode of
operation.
tive timer interrupt flag (T2IF or T3IF) is asserted and
an interrupt will be generated, if enabled. The IF bit is
located in the IFS0 STATUS register, and must be
cleared in software. The interrupt is enabled via the
respective timer interrupt enable bit (T2IE or T3IE),
located in the IEC0 Control register. The output com-
pare interrupt flag is never set during the PWM mode of
operation.
Period
Duty Cycle
TMR3 = Duty Cycle (OCxR)
TMR3 = Duty Cycle (OCxR)
TMR3 = PR3
T3IF = 1
(Interrupt Flag)
(Interrupt Flag)
OCxR = OCxRS
TMR3 = PR3
(Interrupt Flag)
OCxR = OCxRS
T3IF = 1