Microchip Technology AC164337 Data Sheet
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dsPIC30F1010/202X
DS70000178D-page 200
2006-2014 Microchip Technology Inc.
bit 5
LOCK: PLL Lock Status bit (read-only)
1
= Indicates that PLL is in lock
0
= Indicates that PLL is out of lock (or disabled)
This bit is Reset upon:
Reset on POR
Reset when a valid clock switching sequence is initiated by the clock switch state machine
Set when PLL lock is achieved after a PLL start
Reset when lock is lost
Read zero when PLL is not selected as a Group 1 system clock
Reset on POR
Reset when a valid clock switching sequence is initiated by the clock switch state machine
Set when PLL lock is achieved after a PLL start
Reset when lock is lost
Read zero when PLL is not selected as a Group 1 system clock
bit 4
PRCDEN: Pseudo Random Clock Dither Enable bit
1
= Pseudo random clock dither is enabled
0
= Pseudo random clock dither is disabled
bit 3
CF: Clock Fail Detect bit (read/clearable by application)
1
= FSCM has detected clock failure
0
= FSCM has NOT detected clock failure
This bit is Reset upon:
Reset on POR
Reset when a valid clock switching sequence is initiated by the clock switch state machine
Set when clock fail detected
Reset on POR
Reset when a valid clock switching sequence is initiated by the clock switch state machine
Set when clock fail detected
bit 2
TSEQEN: FRC Tune Sequencer Enable bit
1
= The TUN<3:0>, TSEQ1<3:0>,
...
, TSEQ7<3:0> bits in the OSCTUN and the OSCTUN2 registers
sequentially tune the FRC oscillator. Each field being sequentially selected via the ROLL<2:0> sig-
nals from the PWM module.
nals from the PWM module.
0
= The TUN<3:0> bits in OSCTUN register tunes the FRC oscillator
bit 1
Unimplemented: Read as ‘0’
bit 0
OSWEN: Oscillator Switch Enable bit
1
= Request oscillator switch to selection specified by NOSC<1:0> bits
0
= Oscillator switch is complete
This bit is Reset upon:
Reset on POR
Reset after a successful clock switch
Reset after a redundant clock switch
Reset after FSCM switches the oscillator to (Group 3) FRC
Reset on POR
Reset after a successful clock switch
Reset after a redundant clock switch
Reset after FSCM switches the oscillator to (Group 3) FRC
REGISTER 18-1:
OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)