Microchip Technology MA330031-2 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 109
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
4.4.2
EXTENDED X DATA SPACE
The lower portion of the base address space range,
between 0x0000 and 0x7FFF, is always accessible
regardless of the contents of the Data Space Page
registers. It is indirectly addressable through the
register indirect instructions. It can be regarded as
being located in the default EDS Page 0 (i.e., EDS
address range of 0x000000 to 0x007FFF with the base
address bit, EA<15> = 0, for this address range).
However, Page 0 cannot be accessed through the
upper 32 Kbytes, 0x8000 to 0xFFFF, of base Data
Space, in combination with DSRPAG = 0x000 or
DSWPAG = 0x000. Consequently, DSRPAG and
DSWPAG are initialized to 0x001 at Reset.
between 0x0000 and 0x7FFF, is always accessible
regardless of the contents of the Data Space Page
registers. It is indirectly addressable through the
register indirect instructions. It can be regarded as
being located in the default EDS Page 0 (i.e., EDS
address range of 0x000000 to 0x007FFF with the base
address bit, EA<15> = 0, for this address range).
However, Page 0 cannot be accessed through the
upper 32 Kbytes, 0x8000 to 0xFFFF, of base Data
Space, in combination with DSRPAG = 0x000 or
DSWPAG = 0x000. Consequently, DSRPAG and
DSWPAG are initialized to 0x001 at Reset.
The remaining pages, including both EDS and PSV
pages, are only accessible using the DSRPAG or
DSWPAG registers in combination with the upper
32 Kbytes, 0x8000 to 0xFFFF, of the base address,
where base address bit, EA<15> = 1.
For example, when DSRPAG = 0x001 or
DSWPAG = 0x001, accesses to the upper 32 Kbytes,
0x8000 to 0xFFFF, of the Data Space will map to the
EDS address range of 0x008000 to 0x00FFFF. When
DSRPAG = 0x002 or DSWPAG = 0x002, accesses to
the upper 32 Kbytes of the Data Space will map to the
EDS address range of 0x010000 to 0x017FFF and so
on, as shown in the EDS memory map in
pages, are only accessible using the DSRPAG or
DSWPAG registers in combination with the upper
32 Kbytes, 0x8000 to 0xFFFF, of the base address,
where base address bit, EA<15> = 1.
For example, when DSRPAG = 0x001 or
DSWPAG = 0x001, accesses to the upper 32 Kbytes,
0x8000 to 0xFFFF, of the Data Space will map to the
EDS address range of 0x008000 to 0x00FFFF. When
DSRPAG = 0x002 or DSWPAG = 0x002, accesses to
the upper 32 Kbytes of the Data Space will map to the
EDS address range of 0x010000 to 0x017FFF and so
on, as shown in the EDS memory map in
For more information on the PSV page access using
Data Space Page registers, refer to the “Program
Space Visibility from Data Space”
Data Space Page registers, refer to the “Program
Space Visibility from Data Space”
section in
“Program Memory”
(DS70613) of the “dsPIC33/
PIC24 Family Reference Manual”
.
FIGURE 4-17:
EDS MEMORY MAP
Note 1:
DSxPAG should not be used to access
Page 0. An EDS access with DSxPAG
set to 0x000 will generate an address
error trap.
Page 0. An EDS access with DSxPAG
set to 0x000 will generate an address
error trap.
2:
Clearing the DSxPAG in software has no
effect.
effect.
0x008000
0x010000
0x018000
PAGE 3
PAGE 2
PAGE 1FD
0xFE8000
0xFF0000
0xFF8000
PAGE 1FF
PAGE 1FE
SFR/DS
0x0000
0xFFFF
EDS EA Address (24 bits)
DS
Conventional
EA<15:0>
0x8000
(PAGE 0)
(DSRPAG<8:0>, EA<14:0>)
(DSWPAG<8:0>, EA<14:0>)
PAGE 1
DSRPAG<9> = 0
DS Address