Microchip Technology MA330031-2 Data Sheet

Page of 530
 2011-2013 Microchip Technology Inc.
DS70000657H-page 117
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
4.8
Interfacing Program and Data 
Memory Spaces
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X architecture uses a
24-bit-wide Program Space (PS) and a 16-bit-wide
Data Space (DS). The architecture is also a modified
Harvard scheme, meaning that data can also be
present in the Program Space. To use this data suc-
cessfully, it must be accessed in a way that preserves
the alignment of information in both spaces.
Aside from normal execution, the architecture of the
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X
and PIC24EPXXXGP/MC20X devices provides two
methods by which Program Space can be accessed
during operation: 
• Using table instructions to access individual bytes 
or words anywhere in the Program Space
• Remapping a portion of the Program Space into 
the Data Space (Program Space Visibility)
Table instructions allow an application to read or write
to small areas of the program memory. This capability
makes the method ideal for accessing data tables that
need to be updated periodically. It also allows access
to all bytes of the program word. The remapping
method allows an application to access a large block of
data on a read-only basis, which is ideal for look-ups
from a large table of static data. The application can
only access the least significant word of the program
word.
TABLE 4-65:
PROGRAM SPACE ADDRESS CONSTRUCTION
FIGURE 4-22:
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
Access Type
Access
Space
Program Space Address
<23>
<22:16>
<15>
<14:1>
<0>
Instruction Access
(Code Execution)
User
0
PC<22:1>
0
0xx
xxxx
xxxx
xxxx
xxxx
xxx0
TBLRD/TBLWT
(Byte/Word Read/Write)
User
TBLPAG<7:0>
Data EA<15:0>
      0xxx xxxx
xxxx xxxx xxxx xxxx
Configuration TBLPAG<7:0>
Data 
EA<15:0>
      1xxx xxxx
xxxx xxxx xxxx xxxx
0
Program Counter
23 Bits
Program Counter
(1)
TBLPAG
8 Bits
EA
16 Bits
Byte Select
0
1/0
User/Configuration
Table Operations
(2)
Space Select
24 Bits
1/0
Note 1:
The Least Significant bit (LSb) of Program Space addresses is always fixed as ‘0’ to maintain 
word alignment of data in the Program and Data Spaces.
2:
Table operations are not required to be word-aligned. Table Read operations are permitted in the 
configuration memory space.