Microchip Technology MA330031-2 Data Sheet

 2011-2013 Microchip Technology Inc.

DS70000657H-page 127

The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X interrupt controller
reduces the numerous peripheral interrupt request sig-
nals to a single interrupt request signal to the
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X
and PIC24EPXXXGP/MC20X CPU. 
The interrupt controller has the following features:
• Up to eight processor exceptions and software 

traps

• Eight user-selectable priority levels
• Interrupt Vector Table (IVT) with a unique vector 

for each interrupt or exception source

• Fixed priority within a specified user priority level
• Fixed interrupt entry and return latencies

The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X Interrupt Vector
Table (IVT), shown in 

, resides in program

memory starting at location, 000004h. The IVT
contains seven non-maskable trap vectors and up to
246 sources of interrupt. In general, each interrupt
source has its own vector. Each interrupt vector
contains a 24-bit-wide address. The value programmed
into each interrupt vector location is the starting
address of the associated Interrupt Service Routine
(ISR).
Interrupt vectors are prioritized in terms of their natural
priority. This priority is linked to their position in the
vector table. Lower addresses generally have a higher
natural priority. For example, the interrupt associated
with Vector 0 takes priority over interrupts at any other
vector address.

A device Reset is not a true exception because the
interrupt controller is not involved in the Reset process.
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X devices clear their
registers in response to a Reset, which forces the PC
to zero. The device then begins program execution at
location, 0x000000. A GOTO instruction at the Reset
address can redirect program execution to the
appropriate start-up routine.

This data sheet summarizes the
features of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Interrupts” (DS70600) in
the “dsPIC33/PIC24 Family Reference
Manual”

, which is available from the

www.microchip.com

).

Some registers and associated bits
described in this section may not be
available on all devices. Refer to

 in

this data sheet for device-specific register
and bit information.

Any unimplemented or unused vector
locations in the IVT should be
programmed with the address of a default
interrupt handler routine that contains a
RESET

 instruction.