Microchip Technology MA330031-2 Data Sheet

Page of 530
 2011-2013 Microchip Technology Inc.
DS70000657H-page 175
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
11.4
Peripheral Pin Select (PPS)
A major challenge in general purpose devices is provid-
ing the largest possible set of peripheral features while
minimizing the conflict of features on I/O pins. The
challenge is even greater on low pin count devices. In
an application where more than one peripheral needs
to be assigned to a single pin, inconvenient work-
arounds in application code, or a complete redesign,
may be the only option.
Peripheral Pin Select configuration provides an
alternative to these choices by enabling peripheral set
selection and their placement on a wide range of I/O
pins. By increasing the pinout options available on a
particular device, users can better tailor the device to
their entire application, rather than trimming the
application to fit the device.
The Peripheral Pin Select configuration feature oper-
ates over a fixed subset of digital I/O pins. Users may
independently map the input and/or output of most dig-
ital peripherals to any one of these I/O pins. Hardware
safeguards are included that prevent accidental or
spurious changes to the peripheral mapping once it has
been established.
11.4.1
AVAILABLE PINS
The number of available pins is dependent on the
particular device and its pin count. Pins that support the
Peripheral Pin Select feature include the label, “RPn” or
“RPIn”, in their full pin designation, where “n” is the
remappable pin number. “RP” is used to designate pins
that support both remappable input and output
functions, while “RPI” indicates pins that support
remappable input functions only.
11.4.2
AVAILABLE PERIPHERALS
The peripherals managed by the Peripheral Pin Select
are all digital-only peripherals. These include general
serial communications (UART and SPI), general pur-
pose timer clock inputs, timer-related peripherals (input
capture and output compare) and interrupt-on-change
inputs.
In comparison, some digital-only peripheral modules
are never included in the Peripheral Pin Select feature.
This is because the peripheral’s function requires
special I/O circuitry on a specific port and cannot be
easily connected to multiple pins. These modules
include I
2
C™ and the PWM. A similar requirement
excludes all modules with analog inputs, such as the
ADC Converter.
A key difference between remappable and non-
remappable peripherals is that remappable peripherals
are not associated with a default I/O pin. The peripheral
must always be assigned to a specific I/O pin before it
can be used. In contrast, non-remappable peripherals
are always available on a default pin, assuming that the
peripheral is active and not conflicting with another
peripheral.
When a remappable peripheral is active on a given I/O
pin, it takes priority over all other digital I/O and digital
communication peripherals associated with the pin.
Priority is given regardless of the type of peripheral that
is mapped. Remappable peripherals never take priority
over any analog functions associated with the pin.
11.4.3
CONTROLLING PERIPHERAL PIN 
SELECT
Peripheral Pin Select features are controlled through
two sets of SFRs: one to map peripheral inputs and one
to map outputs. Because they are separately con-
trolled, a particular peripheral’s input and output (if the
peripheral has both) can be placed on any selectable
function pin without constraint.
The association of a peripheral to a peripheral-
selectable pin is handled in two different ways,
depending on whether an input or output is being
mapped.