Microchip Technology MA330031-2 Data Sheet

Page of 530
 2011-2013 Microchip Technology Inc.
DS70000657H-page 19
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued) 
64-Pin TQFP
(1,2,3)
= Pins are up to 5V tolerant 
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
RP118/RG6
RPI119/RG7
RP120/RG8
MCLR
RPI121/RG9
V
SS
V
DD
AN10/RPI28/RA12
AN9/RPI27/RA11
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
T
D
O/R
A1
0
R
P
I45/
PWM
2L/
C
T
PLS/
R
B
13
RPI4
4/
PW
M2
H/
RB1
2
R
P
43
/P
WM
3L/
R
B
11
R
P
42
/P
WM
3H
/R
B1
0
RP9
7
/R
F1
R
P
I96/
R
F
0
V
DD
V
CA
P
RP5
7
/RC9
RD6
RD5
RP5
6
/RC8
RP5
5
/RC7
RP5
4
/RC6
T
M
S/ASD
A1/RP41/R
B
9
(4
)
TCK/CV
REF1O
/ASCL1/RP40/T4CK/RB8
RC13
RP39/INT0/RB7
RPI58/RC10
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RPI53/RC5
SDA1/RPI52/RC4
SCK1/RPI51/RC3
SDI1/RPI25/RA9
CV
REF2O
/SDO1/RP20/T1CK/RA4
PG
EC
1/
AN
4/
C
1I
N
1+
/R
PI
34/
R
B
2
PG
ED
1/
AN
5/
C
1I
N
1-
/R
P35/
R
B
3
AV
DD
AV
SS
AN6
/OA3
O
UT
/C4
IN1
+/
OCF
B
/R
C0
AN
7/
C
3
IN
1-
/C
4I
N
1
-/
R
C
1
A
N
8/
C
3I
N
1+
/U
1R
T
S
/B
C
LK
1/
F
LT
3/
RC
2
AN
11
/C
1IN2-
(3
)
/U
1C
T
S
/F
LT
4/
RC1
1
V
SS
V
DD
AN
12/
C
2I
N
2-
(3
)
/U
2R
T
S
/BCLK2/
R
E12
AN
1
3/
C
3IN2-
(3
)
/U2
C
T
S
/R
E
13
AN
14
/R
PI
94/
R
E
14
AN
15
/R
PI
95/
R
E
15
SDA2/
R
PI24/
RA8
FL
T3
2/
SC
L2/
R
P
36/
R
B
4
PIC24EP64MC206
dsPIC33EP64MC206/506
PIC24EP128MC206
PIC24EP256MC206
dsPIC33EP128MC206/506
dsPIC33EP256MC206/506
dsPIC33EP512MC206/506
PIC24EP512MC206
Note
1:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See 
 for available peripherals and for information on limitations.
2:
Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See 
 for more information.
3:
The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected 
to V
SS
 externally.
4:
There is an internal pull-up resistor connected to the TMS pin when the JTAG interface is active. See the 
JTAGEN bit field in 
.