Microchip Technology MA330031-2 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 219
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
15.0
OUTPUT COMPARE
The output compare module can select one of seven
available clock sources for its time base. The module
compares the value of the timer with the value of one or
two compare registers depending on the operating
mode selected. The state of the output pin changes
when the timer value matches the compare register
value. The output compare module generates either a
single output pulse or a sequence of output pulses, by
changing the state of the output pin on the compare
match events. The output compare module can also
generate interrupts on compare match events and
trigger DMA data transfers.
available clock sources for its time base. The module
compares the value of the timer with the value of one or
two compare registers depending on the operating
mode selected. The state of the output pin changes
when the timer value matches the compare register
value. The output compare module generates either a
single output pulse or a sequence of output pulses, by
changing the state of the output pin on the compare
match events. The output compare module can also
generate interrupts on compare match events and
trigger DMA data transfers.
FIGURE 15-1:
OUTPUT COMPARE x MODULE BLOCK DIAGRAM
Note 1:
This data sheet summarizes the features
of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
“Output Compare”
of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
“Output Compare”
(DS70358) in the
“dsPIC33/PIC24 Family Reference Man-
ual
ual
”, which is available from the Microchip
www.microchip.com
).
2:
Some registers and associated bits
described in this section may not be
available on all devices. Refer to
described in this section may not be
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Note:
See “Output Compare” (DS70358) in
the “dsPIC33/PIC24 Family Reference
Manual”
the “dsPIC33/PIC24 Family Reference
Manual”
for OCxR and OCxRS register
restrictions.
OCxR Buffer
Comparator
OCxTMR
OCxCON1
OCxCON2
OCx Interrupt
OCx Pin
OCxRS Buffer
Comparator
Match
Match
Trigger and
Sync Logic
Clock
Select
Increment
Reset
OC Clock
Sources
Sources
Trigger and
Sync Sources
Sync Sources
Reset
Match Event
OCFA
OCxR
OCxRS
Event
Event
Rollover
Rollover/Reset
Rollover/Reset
OCx Synchronization/Trigger Event
OCFB
SYNCSEL<4:0>
Trigger
Trigger
(1)
Note
1:
The Trigger/Sync source is enabled by default and is set to Timer2 as a source. This timer must be enabled for
proper OCx module operation or the Trigger/Sync source must be changed to another source option.
proper OCx module operation or the Trigger/Sync source must be changed to another source option.
PTG Trigger Input
CTMU Edge
Control Logic
OC Output and
Fault Logic