Microchip Technology MA330031-2 Data Sheet
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 292
2011-2013 Microchip Technology Inc.
REGISTER 21-3:
CxVEC: ECANx INTERRUPT CODE REGISTER
U-0
U-0
U-0
R-0
R-0
R-0
R-0
R-0
—
—
—
FILHIT4
FILHIT3
FILHIT2
FILHIT1
FILHIT0
bit 15
bit 8
U-0
R-1
R-0
R-0
R-0
R-0
R-0
R-0
—
ICODE6
ICODE5
ICODE4
ICODE3
ICODE2
ICODE1
ICODE0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
Unimplemented:
Read as ‘0’
bit 12-8
FILHIT<4:0>:
Filter Hit Number bits
10000-11111
= Reserved
01111
= Filter 15
•
•
•
•
•
00001
= Filter 1
00000
= Filter 0
bit 7
Unimplemented:
Read as ‘0’
bit 6-0
ICODE<6:0>:
Interrupt Flag Code bits
1000101-1111111
= Reserved
1000100
= FIFO almost full interrupt
1000011
= Receiver overflow interrupt
1000010
= Wake-up interrupt
1000001
= Error interrupt
1000000
= No interrupt
•
•
•
•
•
0010000-0111111
= Reserved
0001111
= RB15 buffer interrupt
•
•
•
•
•
0001001
= RB9 buffer interrupt
0001000
= RB8 buffer interrupt
0000111
= TRB7 buffer interrupt
0000110
= TRB6 buffer interrupt
0000101
= TRB5 buffer interrupt
0000100
= TRB4 buffer interrupt
0000011
= TRB3 buffer interrupt
0000010
= TRB2 buffer interrupt
0000001
= TRB1 buffer interrupt
0000000
= TRB0 buffer interrupt