Microchip Technology MA330031-2 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 297
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 21-7:
CxINTE: ECANx INTERRUPT ENABLE REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
IVRIE
WAKIE
ERRIE
—
FIFOIE
RBOVIE
RBIE
TBIE
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
Unimplemented:
Read as ‘0’
bit 7
IVRIE:
Invalid Message Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 6
WAKIE:
Bus Wake-up Activity Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 5
ERRIE:
Error Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 4
Unimplemented:
Read as ‘0’
bit 3
FIFOIE:
FIFO Almost Full Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 2
RBOVIE:
RX Buffer Overflow Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 1
RBIE:
RX Buffer Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled
bit 0
TBIE:
TX Buffer Interrupt Enable bit
1
= Interrupt request is enabled
0
= Interrupt request is not enabled