Microchip Technology MA330031-2 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 369
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
bit 3
ABEN:
AND Gate B Input Enable bit
1
= MBI is connected to AND gate
0
= MBI is not connected to AND gate
bit 2
ABNEN:
AND Gate B Input Inverted Enable bit
1
= Inverted MBI is connected to AND gate
0
= Inverted MBI is not connected to AND gate
bit 1
AAEN:
AND Gate A Input Enable bit
1
= MAI is connected to AND gate
0
= MAI is not connected to AND gate
bit 0
AANEN:
AND Gate A Input Inverted Enable bit
1
= Inverted MAI is connected to AND gate
0
= Inverted MAI is not connected to AND gate
REGISTER 25-5:
CMxMSKCON: COMPARATOR x MASK GATING
CONTROL REGISTER (CONTINUED)
CONTROL REGISTER (CONTINUED)