Microchip Technology MA330031-2 Data Sheet

Page of 530
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 374
 2011-2013 Microchip Technology Inc.
FIGURE 26-2:
CRC SHIFT ENGINE DETAIL
26.1
Overview
The CRC module can be programmed for CRC
polynomials of up to the 32nd order, using up to 32 bits.
Polynomial length, which reflects the highest exponent
in the equation, is selected by the PLEN<4:0> bits
(CRCCON2<4:0>). 
The CRCXORL and CRCXORH registers control which
exponent terms are included in the equation. Setting a
particular bit includes that exponent term in the
equation; functionally, this includes an XOR operation
on the corresponding bit in the CRC engine. Clearing
the bit disables the XOR.
For example, consider two CRC polynomials, one a
16-bit equation and the other a 32-bit equation:
To program these polynomials into the CRC generator,
set the register bits as shown in 
.
Note that the appropriate positions are set to ‘1’ to
indicate that they are used in the equation (for example,
X26 and X23). The 0 bit required by the equation is
always XORed; thus, X0 is a don’t care. For a poly-
nomial of length N, it is assumed that the Nth bit will
always be used, regardless of the bit setting. Therefore,
for a polynomial length of 32, there is no 32nd bit in the
CRCxOR register.
TABLE 26-1:
 
CRC SETUP EXAMPLES FOR 
16 AND 32-BIT POLYNOMIAL
26.2
Programmable CRC Resources
Many useful resources are provided on the main prod-
uct page of the Microchip web site for the devices listed
in this data sheet. This product page, which can be
accessed using this 
, contains the latest updates
and additional information.
26.2.1
KEY RESOURCES
• “Programmable Cyclic Redundancy Check 
(CRC)”
 (DS70346) in the “dsPIC33/PIC24 Family 
Reference Manual”
• Code Samples
• Application Notes
• Software Libraries
• Webinars
• All Related “dsPIC33/PIC24 Family Reference 
Manual”
 Sections
• Development Tools
CRCWDATH
CRCWDATL
Bit 0
Bit 1
Bit n
(2)
X(1)
(1)
Read/Write Bus
Shift Buffer
Data
Bit 2
X(2)
(1)
X(n)
(1)
Note
1:
Each XOR stage of the shift engine is programmable. See text for details.
2:
Polynomial length n is determined by ([PLEN<4:0>] + 1).
x16 + x12 + x5 + 1
and
x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 
+ x5 + x4 + x2 + x + 1
CRC Control 
Bits
Bit Values
16-bit 
Polynomial
32-bit 
Polynomial
PLEN<4:0>
01111
11111
X<31:16>
0000 0000 
0000 000x
0000 0100 
1100 0001
X<15:0>
0001 0000 
0010 000x
0001 1101 
1011 011x
Note:
In the event you are not able to access the
product page using the link above, enter
this URL in your browser: