Microchip Technology MA330031-2 Data Sheet

Page of 530
 2011-2013 Microchip Technology Inc.
DS70000657H-page 427
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
FIGURE 30-15:
SPI2 MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY, CKE = 1) 
TIMING CHARACTERISTICS
TABLE 30-34: SPI2 MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY) TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
-40°C
 T
A
 
 +85°C for Industrial
-40°C
 T
A
 
 +125°C for Extended
Param.
Symbol
Characteristic
Min.
Typ.
Max.
Units
Conditions
SP10
FscP
Maximum SCK2 Frequency
15
MHz
(Note 
SP20
TscF
SCK2 Output Fall Time
ns
See Parameter 
(Note 
SP21
TscR
SCK2 Output Rise Time
ns
See Parameter 
(Note 
SP30
TdoF
SDO2 Data Output Fall Time
ns
See Parameter 
(Note 
SP31
TdoR
SDO2 Data Output Rise Time
ns
See Paramete
(Note 
SP35
TscH2doV,
TscL2doV
SDO2 Data Output Valid after 
SCK2 Edge
6
20
ns
SP36
TdiV2scH,
TdiV2scL
SDO2 Data Output Setup to 
First SCK2 Edge
30
ns
Note 1:
These parameters are characterized, but are not tested in manufacturing.
2:
Data in “Typical” column is at 3.3V, +25°C unless otherwise stated.
3:
The minimum clock period for SCK2 is 66.7 ns. Therefore, the clock generated in Master mode must not 
violate this specification.
4:
Assumes 50 pF load on all SPI2 pins.
SCK2
(CKP = 0)
SCK2
(CKP = 1)
SDO2
SP21
SP20
SP35
SP20
SP21
MSb
LSb
Bit 14 - - - - - -1
SP30, SP31
Note: 
Refer to 
 for load conditions.
SP36
SP10