Microchip Technology MA330031-2 Data Sheet
2011-2013 Microchip Technology Inc.
DS70000657H-page 45
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
4.0
MEMORY ORGANIZATION
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X architecture
features separate program and data memory spaces,
and buses. This architecture also allows the direct
access of program memory from the Data Space (DS)
during code execution.
50X and PIC24EPXXXGP/MC20X architecture
features separate program and data memory spaces,
and buses. This architecture also allows the direct
access of program memory from the Data Space (DS)
during code execution.
4.1
Program Address Space
The program address memory space of the
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X
and PIC24EPXXXGP/MC20X devices is 4M
instructions. The space is addressable by a 24-bit
value derived either from the 23-bit PC during program
execution, or from table operation or Data Space
remapping, as described in
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X
and PIC24EPXXXGP/MC20X devices is 4M
instructions. The space is addressable by a 24-bit
value derived either from the 23-bit PC during program
execution, or from table operation or Data Space
remapping, as described in
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD
operations, which use TBLPAG<7> to read
Device ID sections of the configuration memory space.
The program memory maps, which are presented by
device family and memory size, are shown in
The program memory maps, which are presented by
device family and memory size, are shown in
through
FIGURE 4-1:
PROGRAM MEMORY MAP FOR dsPIC33EP32GP50X, dsPIC33EP32MC20X/50X AND
PIC24EP32GP/MC20X DEVICES
PIC24EP32GP/MC20X DEVICES
Note:
This data sheet summarizes the
features of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to “Program Memory” (DS70613) in
the “dsPIC33/PIC24 Family Reference
Manual
features of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to “Program Memory” (DS70613) in
the “dsPIC33/PIC24 Family Reference
Manual
”, which is available from the
www.microchip.com
).
Reset Address
0x000000
0x000002
0x000002
Write Latches
User Program
Flash Memory
0x0057EC
0x0057EA
(11K instructions)
0x800000
0xFA0000
0xFA0002
0xFA0002
0xFA0004
DEVID
0xFEFFFE
0xFF0000
0xFFFFFE
0xF9FFFE
Unimplemented
(Read ‘0’s)
GOTO
Instruction
0x000004
Reserved
0x7FFFFE
Reserved
0x000200
0x0001FE
Interrupt Vector Table
C
on
fig
u
rat
io
n M
em
or
y S
pace
U
ser
Me
mo
ry
S
pac
e
Flash Configuration
Bytes
0x005800
0x0057FE
Reserved
0xFF0002
Note:
Memory areas are not shown to scale.
0xFF0004
Reserved
0x800FF8
0x800FF6
0x801000
0x800FFE
USERID