Microchip Technology MA330031-2 Data Sheet
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 50
2011-2013 Microchip Technology Inc.
4.1.1
PROGRAM MEMORY
ORGANIZATION
ORGANIZATION
The program memory space is organized in word-
addressable blocks. Although it is treated as 24 bits
wide, it is more appropriate to think of each address of
the program memory as a lower and upper word, with
the upper byte of the upper word being unimplemented.
The lower word always has an even address, while the
upper word has an odd address (
addressable blocks. Although it is treated as 24 bits
wide, it is more appropriate to think of each address of
the program memory as a lower and upper word, with
the upper byte of the upper word being unimplemented.
The lower word always has an even address, while the
upper word has an odd address (
Program memory addresses are always word-aligned
on the lower word and addresses are incremented, or
decremented by two, during code execution. This
arrangement provides compatibility with data memory
space addressing and makes data in the program
memory space accessible.
on the lower word and addresses are incremented, or
decremented by two, during code execution. This
arrangement provides compatibility with data memory
space addressing and makes data in the program
memory space accessible.
4.1.2
INTERRUPT AND TRAP VECTORS
All dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X devices reserve the
addresses between 0x000000 and 0x000200 for hard-
coded program execution vectors. A hardware Reset
vector is provided to redirect code execution from the
default value of the PC on device Reset to the actual
start of code. A GOTO instruction is programmed by the
user application at address, 0x000000, of Flash
memory, with the actual address for the start of code at
address, 0x000002, of Flash memory.
A more detailed discussion of the Interrupt Vector
Tables (IVTs) is provided in
50X and PIC24EPXXXGP/MC20X devices reserve the
addresses between 0x000000 and 0x000200 for hard-
coded program execution vectors. A hardware Reset
vector is provided to redirect code execution from the
default value of the PC on device Reset to the actual
start of code. A GOTO instruction is programmed by the
user application at address, 0x000000, of Flash
memory, with the actual address for the start of code at
address, 0x000002, of Flash memory.
A more detailed discussion of the Interrupt Vector
Tables (IVTs) is provided in
.
FIGURE 4-6:
PROGRAM MEMORY ORGANIZATION
0
8
16
PC Address
0x000000
0x000002
0x000004
0x000006
0x000002
0x000004
0x000006
23
00000000
00000000
00000000
00000000
Program Memory
‘Phantom’ Byte
(read as ‘0’)
least significant word
most significant word
Instruction Width
0x000001
0x000003
0x000005
0x000007
0x000003
0x000005
0x000007
msw
Address
(lsw Address)