Microchip Technology MA330031-2 Data Sheet

Page of 530
 2011-2013 Microchip Technology Inc.
DS70000657H-page 517
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
INDEX
A
DMA Module Requirements...................................... 465
ECANx I/O Requirements ......................................... 454
External Clock........................................................... 414
High-Speed PWMx Requirements ............................ 422
I/O Timing Requirements .......................................... 416
I2Cx Bus Data Requirements (Master Mode) ........... 451
I2Cx Bus Data Requirements (Slave Mode) ............. 453
Input Capture x Requirements .................................. 420
Internal FRC Accuracy.............................................. 415
Internal LPRC Accuracy............................................ 415
Internal RC Accuracy ................................................ 472
Load Conditions ................................................ 413, 471
OCx/PWMx Mode Requirements.............................. 421
Op Amp/Comparator Voltage Reference 
ADC
B
Block Diagrams
Arbiter Architecture................................................... 110
BEMF Voltage Measurement Using ADC................... 34
Boost Converter Implementation ................................ 32
CALL Stack Frame ................................................... 111
Comparator (Module 4) ............................................ 356
Connections for On-Chip Voltage Regulator ............ 384
CPU Core ................................................................... 36
CRC Module ............................................................. 373
CRC Shift Engine ..................................................... 374
CTMU Module .......................................................... 316
Digital Filter Interconnect.......................................... 357
DMA Controller ......................................................... 141
DMA Controller Module ............................................ 139
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X 
ECAN Module........................................................... 288
EDS Read Address Generation................................ 105
EDS Write Address Generation................................ 106
Example of MCLR Pin Connections ........................... 30
High-Speed PWMx Architectural Overview .............. 227
High-Speed PWMx Register Interconnection ........... 228
I2Cx Module ............................................................. 274
Input Capture x ......................................................... 213
Interleaved PFC.......................................................... 34
Multiphase Synchronous Buck Converter .................. 33
Multiplexing Remappable Output for RPn ................ 180
Op Amp Configuration A........................................... 358
Op Amp Configuration B........................................... 359
Op Amp/Comparator Voltage Reference Module..... 356
Op Amp/Comparator x (Modules 1, 2, 3).................. 355
Oscillator System...................................................... 153
Output Compare x Module ....................................... 219
PLL ........................................................................... 154
Programmer’s Model .................................................. 38
PTG Module ............................................................. 338
Quadrature Encoder Interface .................................. 250
Recommended Minimum Connection ........................ 30