Microchip Technology MA330031-2 Data Sheet

Page of 530
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 6
 2011-2013 Microchip Technology Inc.
Pin Diagrams (Continued)
28-Pin QFN-S
(1,2,3)
= Pins are up to 5V tolerant 
28 27 26 25 24 23 22
8
9 10 11 12 13 14
3
18
17
16
15
4
5
7
1
2
20
19
6
21
PIC24EPXXXGP202
dsPIC33EPXXXGP502
TC
K
/C
V
RE
F
1
O
/ASCL
1
/SDO1
/RP4
0/
T
4
CK/RB8
SCK1
/R
P3
9/
IN
T
0
/R
B7
P
G
EC2
/ASCL
2
/R
P3
8
/RB6
PG
ED2
/AS
DA2
/RP3
7
/R
B5
V
DD
CV
RE
F
2O
/RP
20/
T
1
CK
/RA
4
RP3
6
/RB4
RPI45/CTPLS/RB13
RPI44/RB12
TDI/RP43/RB11
TDO/RP42/RB10
V
CAP
V
SS
TMS/ASDA1/SDI1/RP41/RB9
(4)
RPI4
6/
T
3CK/RB1
4
RPI4
7/
T
5CK/RB1
5
AV
SS
AV
DD
MC
LR
A
N
0/
OA
2OU
T
/R
A
0
A
N
1/
C2IN1
+
/RA
1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
V
SS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
Note
1:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See 
 for available peripherals and for information on limitations.
2:
Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See 
 for more information.
3:
The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected 
to V
SS
 externally.
4:
There is an internal pull-up resistor connected to the TMS pin when the JTAG interface is active. See the 
JTAGEN bit field in