Microchip Technology MA330031-2 Data Sheet



2011-2

013 M

rochip

chnology

DS70000657H

-page

dsPI

C3
3E
PXX

XGP5

0X
, dsP

EPX

XXM

0X
A
N

P
IC

EPX

XXG

P/M

20
X

TABLE 4-8:

TIMER1 THROUGH TIMER5 REGISTER MAP

SFR

Name

Addr.

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

All

Resets

TMR1

0100

Timer1 Register

xxxx

PR1

0102

Period Register 1

FFFF

T1CON

0104

TON

—

TSIDL

—

TGATE

TCKPS<1:0>

—

TSYNC

TCS

—

0000

TMR2

0106

Timer2 Register

xxxx

TMR3HLD 0108

Timer3 Holding Register (for 32-bit timer operations only)

xxxx

TMR3

010A

Timer3 Register

xxxx

PR2

010C

Period Register 2

FFFF

PR3

010E

Period Register 3

FFFF

T2CON

0110

TON

—

TSIDL

—

TGATE

TCKPS<1:0>

T32

—

TCS

—

0000

T3CON

0112

TON

—

TSIDL

—

TGATE

TCKPS<1:0>

—

TCS

—

0000

TMR4

0114

Timer4 Register

xxxx

TMR5HLD 0116

Timer5 Holding Register (for 32-bit operations only)

xxxx

TMR5

0118

Timer5 Register

xxxx

PR4

011A

Period Register 4

FFFF

PR5

011C

Period Register 5

FFFF

T4CON

011E

TON

—

TSIDL

—

TGATE

TCKPS<1:0>

T32

—

TCS

—

0000

T5CON

0120

TON

—

TSIDL

—

TGATE

TCKPS<1:0>

—

TCS

—

0000

Legend:

= unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.