Microchip Technology MCP1630DM-DDBS1 Data Sheet
PIC12F683
DS41211D-page 34
©
2007 Microchip Technology Inc.
REGISTER 4-4:
WPU: WEAK PULL-UP REGISTER
U-0
U-0
R/W-1
R/W-1
U-0
R/W-1
R/W-1
R/W-1
—
—
WPU5
WPU4
—
WPU2
WPU1
WPU0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘
0
’
bit 5-4
WPU<5:4>: Weak Pull-up Control bits
1
= Pull-up enabled
0
= Pull-up disabled
bit 3
Unimplemented: Read as ‘
0
’
bit 2-0
WPU<2:0>: Weak Pull-up Control bits
1
= Pull-up enabled
0
= Pull-up disabled
Note 1:
Global GPPU must be enabled for individual pull-ups to be enabled.
2:
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISIO =
0
).
3:
The GP3 pull-up is enabled when configured as MCLR and disabled as an I/O in the Configuration Word.
4:
WPU<5:4> always reads ‘
1
’ in XT, HS and LP OSC modes.
REGISTER 4-5:
IOC: INTERRUPT-ON-CHANGE GPIO REGISTER
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘
0
’
bit 5-0
IOC<5:0>: Interrupt-on-change GPIO Control bits
1
= Interrupt-on-change enabled
0
= Interrupt-on-change disabled
Note 1:
Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
2:
IOC<5:4> always reads ‘
0
’ in XT, HS and LP OSC modes.