Microchip Technology MCP1630DM-DDBS1 Data Sheet
PIC12F683
DS41211D-page 48
©
2007 Microchip Technology Inc.
TABLE 6-1:
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
CONFIG
(1)
CPD
CP
MCLRE
PWRTE
WDTE
FOSC2
FOSC1
FOSC0
—
—
CMCON1
—
—
—
—
—
—
T1GSS
CMSYNC
---- --10
---- --10
INTCON
GIE
PEIE
T0IE
INTE
GPIE
T0IF
INTF
GPIF
0000 0000
0000 000x
PIE1
EEIE
ADIE
CCP1IE
—
CMIE
OSFIE
TMR2IE
TMR1IE
000- 0000
000- 0000
PIR1
EEIF
ADIF
CCP1IF
—
CMIF
OSFIF
TMR2IF
TMR1IF
000- 0000
000- 0000
TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx
uuuu uuuu
TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx
uuuu uuuu
T1CON
T1GINV
TMR1GE
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TMR1CS
TMR1ON
0000 0000
uuuu uuuu
Legend:
x
= unknown,
u
= unchanged,
–
= unimplemented, read as ‘
0
’. Shaded cells are not used by the Timer1 module.
Note
1:
See Configuration Word register (Register 12-1) for operation of all register bits.