Microchip Technology DM240015 Data Sheet
2012-2013 Microchip Technology Inc.
DS30009312B-page 193
PIC24FJ128GC010 FAMILY
11.4.3.1
Input Mapping
The inputs of the Peripheral Pin Select options are
mapped on the basis of the peripheral; that is, a control
register associated with a peripheral dictates the pin it
will be mapped to. The RPINRx registers are used to
configure peripheral input mapping (see
mapped on the basis of the peripheral; that is, a control
register associated with a peripheral dictates the pin it
will be mapped to. The RPINRx registers are used to
configure peripheral input mapping (see
through
).
Each register contains two sets of 6-bit fields, with each
set associated with one of the pin-selectable peripher-
als. Programming a given peripheral’s bit field, with an
appropriate 6-bit value, maps the RPn/RPIn pin with
that value to that peripheral. For any given device, the
valid range of values for any of the bit fields corre-
sponds to the maximum number of Peripheral Pin
Selections supported by the device.
set associated with one of the pin-selectable peripher-
als. Programming a given peripheral’s bit field, with an
appropriate 6-bit value, maps the RPn/RPIn pin with
that value to that peripheral. For any given device, the
valid range of values for any of the bit fields corre-
sponds to the maximum number of Peripheral Pin
Selections supported by the device.
TABLE 11-3:
SELECTABLE INPUT SOURCES (MAPS INPUT TO FUNCTION)
)
Input Name
Function Name
Register
Function Mapping
Bits
DSM Modulation Input
MDMIN
RPINR30
MDMIR<5:0>
DSM Carrier 1 Input
MDCIN1
RPINR31
MDC1R<5:0>
DSM Carrier 2 Input
MDCIN2
RPINR31
MDC2R<5:0>
External Interrupt 1
INT1
RPINR0
INT1R<5:0>
External Interrupt 2
INT2
RPINR1
INT2R<5:0>
External Interrupt 3
INT3
RPINR1
INT3R<5:0>
External Interrupt 4
INT4
RPINR2
INT4R<5:0>
Input Capture 1
IC1
RPINR7
IC1R<5:0>
Input Capture 2
IC2
RPINR7
IC2R<5:0>
Input Capture 3
IC3
RPINR8
IC3R<5:0>
Input Capture 4
IC4
RPINR8
IC4R<5:0>
Input Capture 5
IC5
RPINR9
IC5R<5:0>
Input Capture 6
IC6
RPINR9
IC6R<5:0>
Input Capture 7
IC7
RPINR10
IC7R<5:0>
Input Capture 8
IC8
RPINR10
IC8R<5:0>
Input Capture 9
IC9
RPINR15
IC9R<5:0>
Output Compare Fault A
OCFA
RPINR11
OCFAR<5:0>
Output Compare Fault B
OCFB
RPINR11
OCFBR<5:0>
SPI1 Clock Input
SCK1IN
RPINR20
SCK1R<5:0>
SPI1 Data Input
SDI1
RPINR20
SDI1R<5:0>
SPI1 Slave Select Input
SS1IN
RPINR21
SS1R<5:0>
SPI2 Clock Input
SCK2IN
RPINR22
SCK2R<5:0>
SPI2 Data Input
SDI2
RPINR22
SDI2R<5:0>
SPI2 Slave Select Input
SS2IN
RPINR23
SS2R<5:0>
Generic Timer External Clock
TMRCK
RPINR23
TMRCK<5:0>
UART1 Clear-to-Send
U1CTS
RPINR18
U1CTSR<5:0>
UART1 Receive
U1RX
RPINR18
U1RXR<5:0>
UART2 Clear-to-Send
U2CTS
RPINR19
U2CTSR<5:0>
UART2 Receive
U2RX
RPINR19
U2RXR<5:0>
UART3 Clear-to-Send
U3CTS
RPINR21
U3CTSR<5:0>
UART3 Receive
U3RX
RPINR17
U3RXR<5:0>
UART4 Clear-to-Send
U4CTS
RPINR27
U4CTSR<5:0>
UART4 Receive
U4RX
RPINR27
U4RXR<5:0>
Note 1:
Unless otherwise noted, all inputs use the Schmitt Trigger (ST) input buffers.