Microchip Technology DM240015 Data Sheet

DS30009312B-page 228

 2012-2013 Microchip Technology Inc.

In Compare mode (

), the output compare

module can be configured for single-shot or continuous
pulse generation. It can also repeatedly toggle an
output pin on each timer event.
To set up the module for compare operations:
1.

Configure the OCx output for one of the
available Peripheral Pin Select pins.

2.

Calculate the required values for the OCxR and
(for Double Compare modes) OCxRS Duty
Cycle registers:
a)

Determine the instruction clock cycle time.
Take into account the frequency of the
external clock to the timer source (if one is
used) and the timer prescaler settings.

b)

Calculate time to the rising edge of the
output pulse relative to the timer start value
(0000h).

c)

Calculate the time to the falling edge of the
pulse based on the desired pulse width and
the time to the rising edge of the pulse.

3.

Write the rising edge value to OCxR and the
falling edge value to OCxRS.

4.

Set the Timer Period register, PRy, to a value
equal to or greater than the value in OCxRS.

5.

Set the OCM<2:0> bits for the appropriate
compare operation (= 0xx).

6.

For Trigger mode operations, set OCTRIG to
enable Trigger mode. Set or clear TRIGMODE
to configure trigger operation and TRIGSTAT to
select a hardware or software trigger. For
Synchronous mode, clear OCTRIG.

7.

Set the SYNCSEL<4:0> bits to configure the
trigger or synchronization source. If free-running
timer operation is required, set the SYNCSELx
bits to ‘00000’ (no sync/trigger source).

8.

Select the time base source with the
OCTSEL<2:0> bits. If necessary, set the TON bit
for the selected timer, which enables the com-
pare time base to count. Synchronous mode
operation starts as soon as the time base is
enabled; Trigger mode operation starts after a
trigger source event occurs.

Comparator

OCxTMR

OCxCON1

OCxCON2

OCx Interrupt

OCx Pin

Comparator

Match Event

Match Event

Trigger and

Sync Logic

Clock

Select

Increment

Reset

OC Clock
Sources

Trigger and
Sync Sources

Reset

Match Event

OCFA/OCFB

OCTSELx

SYNCSELx

TRIGSTAT

TRIGMODE

OCTRIG

OCMx
OCINV
OCTRIS
FLTOUT
FLTTRIEN
FLTMD
ENFLT<2:0>
OCFLT<2:0>

The OCx outputs must be assigned to an available RPn pin before use. See 

 for more information.

The OCFA/OCFB Fault inputs must be assigned to an available RPn/RPIn pin before use. See 

 for more information.

DCB<1:0>

OC Output and

Fault Logic

OCxR and

DCB<1:0>

OCxRS