Microchip Technology DM240015 Data Sheet
PIC24FJ128GC010 FAMILY
DS30009312B-page 266
2012-2013 Microchip Technology Inc.
FIGURE 19-1:
USB OTG MODULE BLOCK DIAGRAM
48 MHz USB Clock
D+
(1)
D-
(1)
USBID
(1)
V
BUS(1)
Transceiver
Comparators
USB
SRP Charge
SRP Discharge
Registers
and
Control
Interface
Voltage
System
RAM
Full-Speed Pull-up
Host Pull-Down
Host Pull-Down
Host Pull-Down
Note
1:
Pins are multiplexed with digital I/O and other device features.
2:
Connecting V
BUS3V3
to V
DD
is highly recommended, as floating this input can cause increased I
PD
currents. The
pin should be tied to V
DD
when the USB functions are not used.
VMIO
(1)
VPIO
(1)
DMH
(1)
DPH
(1)
DMLN
(1)
DPLN
(1)
RCV
(1)
V
BUS
Boost
Assist
External Transceiver Interface
USBOEN
(1)
V
CMPST1
/V
BUSVLD(1)
V
CMPST2
/SESSVLD
(1)
V
BUSST(1)
V
CPCON(1)
SESSEND
(1)
Transceiver Power 3.3V
V
USB3V3(2)
SIE
USB