Microchip Technology DM240015 Data Sheet
PIC24FJ128GC010 FAMILY
DS30009312B-page 294
2012-2013 Microchip Technology Inc.
REGISTER 19-17: U1IR: USB INTERRUPT STATUS REGISTER (HOST MODE ONLY)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
R/K-0, HS
R/K-0, HS
R/K-0, HS
R/K-0, HS
R/K-0, HS
R/K-0, HS
R/K-0, HS
R/K-0, HS
STALLIF
ATTACHIF
RESUMEIF
IDLEIF
TRNIF
SOFIF
UERRIF
DETACHIF
bit 7
bit 0
Legend:
U = Unimplemented bit, read as ‘0’
R = Readable bit
K = Write ‘1’ to Clear bit
HS = Hardware Settable bit
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
Unimplemented:
Read as ‘0’
bit 7
STALLIF:
STALL Handshake Interrupt bit
1
= A STALL handshake was sent by the peripheral device during the handshake phase of the
transaction in Device mode
0
= A STALL handshake has not been sent
bit 6
ATTACHIF:
Peripheral Attach Interrupt bit
1
= A peripheral attachment has been detected by the module; it is set if the bus state is not SE0 and
there has been no bus activity for 2.5
s
0
= No peripheral attachment has been detected
bit 5
RESUMEIF:
Resume Interrupt bit
1
= A K-state is observed on the D+ or D- pin for 2.5
s (differential ‘1’ for low speed, differential ‘0’ for
full speed)
0
= No K-state is observed
bit 4
IDLEIF:
Idle Detect Interrupt bit
1
= Idle condition is detected (constant Idle state of 3 ms or more)
0
= No Idle condition is detected
bit 3
TRNIF:
Token Processing Complete Interrupt bit
1
= Processing of the current token is complete; read the U1STAT register for endpoint information
0
= Processing of the current token is not complete; clear the U1STAT register or load the next token
from U1STAT
bit 2
SOFIF:
Start-of-Frame Token Interrupt bit
1
= A Start-of-Frame token is received by the peripheral or the Start-of-Frame threshold is reached by the host
0
= No Start-of-Frame token is received or threshold reached
bit 1
UERRIF:
USB Error Condition Interrupt bit
1
= An unmasked error condition has occurred; only error states enabled in the U1EIE register can set this bit
0
= No unmasked error condition has occurred
bit 0
DETACHIF:
Detach Interrupt bit
1
= A peripheral detachment has been detected by the module; Reset state must be cleared before this
bit can be re-asserted
0
= No peripheral detachment is detected. Individual bits can only be cleared by writing a ‘1’ to the bit
position as part of a word write operation on the entire register. Using Boolean instructions or bitwise
operations to write to a single bit position will cause all set bits, at the moment of the write, to become
cleared.
operations to write to a single bit position will cause all set bits, at the moment of the write, to become
cleared.
Note:
Individual bits can only be cleared by writing a ‘1’ to the bit position as part of a word write operation on the
entire register. Using Boolean instructions or bitwise operations to write to a single bit position will cause
all set bits, at the moment of the write, to become cleared.
entire register. Using Boolean instructions or bitwise operations to write to a single bit position will cause
all set bits, at the moment of the write, to become cleared.